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BibTeX record conf/isscc/ChoSCCKPS17
@inproceedings{DBLP:conf/isscc/ChoSCCKPS17, author = {Hwasuk Cho and Kihwan Seong and Kwang{-}Hee Choi and Jin{-}Hyeok Choi and Byungsub Kim and Hong{-}June Park and Jae{-}Yoon Sim}, title = {8.7 {A} 0.0047mm\({}^{\mbox{2}}\) highly synthesizable {TDC-} and DCO-less fractional-N {PLL} with a seamless lock range of fREF to 1GHz}, booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2017, San Francisco, CA, USA, February 5-9, 2017}, pages = {154--155}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISSCC.2017.7870307}, doi = {10.1109/ISSCC.2017.7870307}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/ChoSCCKPS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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