BibTeX record conf/isscc/CheongYWHKLCKKY18

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@inproceedings{DBLP:conf/isscc/CheongYWHKLCKKY18,
  author       = {Wooseong Cheong and
                  Chanho Yoon and
                  Seonghoon Woo and
                  Kyuwook Han and
                  Daehyun Kim and
                  Chulseung Lee and
                  Youra Choi and
                  Shine Kim and
                  Dongku Kang and
                  Geunyeong Yu and
                  Jaehong Kim and
                  Jaechun Park and
                  Ki{-}Whan Song and
                  Ki{-}Tae Park and
                  Sangyeun Cho and
                  Hwaseok Oh and
                  Daniel D. G. Lee and
                  Jin{-}Hyeok Choi and
                  Jaeheon Jeong},
  title        = {A flash memory controller for 15{\(\mu\)}s ultra-low-latency {SSD}
                  using high-speed 3D {NAND} flash with 3{\(\mu\)}s read time},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {338--340},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310322},
  doi          = {10.1109/ISSCC.2018.8310322},
  timestamp    = {Thu, 15 Dec 2022 08:19:54 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/CheongYWHKLCKKY18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}