BibTeX record conf/isocc/ChoiP17

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@inproceedings{DBLP:conf/isocc/ChoiP17,
  author       = {Wonseok Choi and
                  Jongsun Park},
  title        = {An efficient convolutional neural networks design with heterogeneous
                  {SRAM} cell sizing},
  booktitle    = {International SoC Design Conference, {ISOCC} 2017, Seoul, South Korea,
                  November 5-8, 2017},
  pages        = {103--104},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISOCC.2017.8368790},
  doi          = {10.1109/ISOCC.2017.8368790},
  timestamp    = {Tue, 09 May 2023 16:54:42 +0200},
  biburl       = {https://dblp.org/rec/conf/isocc/ChoiP17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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