BibTeX record conf/islped/ChiuHTZJC13

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@inproceedings{DBLP:conf/islped/ChiuHTZJC13,
  author    = {Yi{-}Wei Chiu and
               Yu{-}Hao Hu and
               Ming{-}Hsien Tu and
               Jun{-}Kai Zhao and
               Shyh{-}Jye Jou and
               Ching{-}Te Chuang},
  editor    = {Pai H. Chou and
               Ru Huang and
               Yuan Xie and
               Tanay Karnik},
  title     = {A 40 nm 0.32 {V} 3.5 MHz 11T single-ended bit-interleaving subthreshold
               {SRAM} with data-aware write-assist},
  booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
               Beijing, China, September 4-6, 2013},
  pages     = {51--56},
  publisher = {{IEEE}},
  year      = {2013},
  url       = {https://doi.org/10.1109/ISLPED.2013.6629266},
  doi       = {10.1109/ISLPED.2013.6629266},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/islped/ChiuHTZJC13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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