BibTeX record conf/iscas/WeiJS06

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@inproceedings{DBLP:conf/iscas/WeiJS06,
  author    = {Ting{-}Zhen Wei and
               Shyh{-}Jye Jou and
               Muh{-}Tian Shiue},
  title     = {Memory reduction {ICFO} estimation architecture for {DVB-T}},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
               May 2006, Island of Kos, Greece},
  year      = {2006},
  crossref  = {DBLP:conf/iscas/2006},
  url       = {https://doi.org/10.1109/ISCAS.2006.1693357},
  doi       = {10.1109/ISCAS.2006.1693357},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/WeiJS06},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2006,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
               May 2006, Island of Kos, Greece},
  publisher = {{IEEE}},
  year      = {2006},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/11145/proceeding},
  isbn      = {0-7803-9389-9},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/iscas/2006},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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