BibTeX record conf/iscas/WangTC00

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@inproceedings{DBLP:conf/iscas/WangTC00,
  author       = {Yan Wang and
                  Chi{-}Ying Tsui and
                  Roger S. Cheng},
  title        = {A low power {VLSI} architecture of SOVA-based turbo-code decoder using
                  scarce state transition scheme},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {283--286},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.857085},
  doi          = {10.1109/ISCAS.2000.857085},
  timestamp    = {Fri, 13 Aug 2021 09:26:01 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WangTC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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