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BibTeX record conf/iscas/TalatiWK17
@inproceedings{DBLP:conf/iscas/TalatiWK17, author = {Nishil Talati and Zhiying Wang and Shahar Kvatinsky}, title = {Rate-compatible and high-throughput architecture designs for encoding {LDPC} codes}, booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017, Baltimore, MD, USA, May 28-31, 2017}, pages = {1--4}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISCAS.2017.8050836}, doi = {10.1109/ISCAS.2017.8050836}, timestamp = {Wed, 28 Oct 2020 14:53:39 +0100}, biburl = {https://dblp.org/rec/conf/iscas/TalatiWK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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