BibTeX record conf/iscas/ReimannPFJR13

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@inproceedings{DBLP:conf/iscas/ReimannPFJR13,
  author       = {Tiago Reimann and
                  Gracieli Posser and
                  Guilherme Flach and
                  Marcelo O. Johann and
                  Ricardo Reis},
  title        = {Simultaneous gate sizing and Vt assignment using Fanin/Fanout ratio
                  and Simulated Annealing},
  booktitle    = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
                  Beijing, China, May 19-23, 2013},
  pages        = {2549--2552},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISCAS.2013.6572398},
  doi          = {10.1109/ISCAS.2013.6572398},
  timestamp    = {Tue, 22 Oct 2019 15:21:22 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ReimannPFJR13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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