BibTeX record conf/iscas/NebashiSHMTITMFKHEKOS14

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@inproceedings{DBLP:conf/iscas/NebashiSHMTITMFKHEKOS14,
  author       = {Ryusuke Nebashi and
                  Noboru Sakimura and
                  Hiroaki Honjo and
                  Ayuka Morioka and
                  Yukihide Tsuji and
                  Kunihiko Ishihara and
                  Keiichi Tokutome and
                  Sadahiko Miura and
                  Shunsuke Fukami and
                  Keizo Kinoshita and
                  Takahiro Hanyu and
                  Tetsuo Endoh and
                  Naoki Kasai and
                  Hideo Ohno and
                  Tadahiko Sugibayashi},
  title        = {A delay circuit with 4-terminal magnetic-random-access-memory device
                  for power-efficient time- domain signal processing},
  booktitle    = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
                  Melbourne, Victoria, Australia, June 1-5, 2014},
  pages        = {1588--1591},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISCAS.2014.6865453},
  doi          = {10.1109/ISCAS.2014.6865453},
  timestamp    = {Thu, 14 Oct 2021 10:40:45 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/NebashiSHMTITMFKHEKOS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}