BibTeX record conf/iscas/HuangYL01

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@inproceedings{DBLP:conf/iscas/HuangYL01,
  author       = {Chun{-}Yueh Huang and
                  Gwo{-}Jeng Yu and
                  Bin{-}Da Liu},
  title        = {A hardware design approach for merge-sorting network},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {534--537},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922292},
  doi          = {10.1109/ISCAS.2001.922292},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/HuangYL01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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