BibTeX record conf/iscas/ChengT15

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@inproceedings{DBLP:conf/iscas/ChengT15,
  author       = {Yu{-}Wei Cheng and
                  Kea{-}Tiong Tang},
  title        = {A 0.5-V 1.28-MS/s 10-bit {SAR} {ADC} with switching detect logic},
  booktitle    = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2015, Lisbon, Portugal, May 24-27, 2015},
  pages        = {293--296},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISCAS.2015.7168628},
  doi          = {10.1109/ISCAS.2015.7168628},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChengT15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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