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BibTeX record conf/irps/LinKCLHTLLCWL18
@inproceedings{DBLP:conf/irps/LinKCLHTLLCWL18, author = {T. W. Lin and S. H. Ku and C. H. Cheng and C. W. Lee and Ijen Huang and Wen{-}Jer Tsai and T. C. Lu and W. P. Lu and K. C. Chen and Tahui Wang and Chih{-}Yuan Lu}, title = {Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory}, booktitle = {{IEEE} International Reliability Physics Symposium, {IRPS} 2018, Burlingame, CA, USA, March 11-15, 2018}, pages = {6--1}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/IRPS.2018.8353679}, doi = {10.1109/IRPS.2018.8353679}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/irps/LinKCLHTLLCWL18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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