BibTeX record conf/icpp/YanJSST18

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@inproceedings{DBLP:conf/icpp/YanJSST18,
  author       = {Zhichao Yan and
                  Hong Jiang and
                  Witawas Srisa{-}an and
                  Sharad C. Seth and
                  Yujuan Tan},
  title        = {Leverage Redundancy in Hardware Transactional Memory to Improve Cache
                  Reliability},
  booktitle    = {Proceedings of the 47th International Conference on Parallel Processing,
                  {ICPP} 2018, Eugene, OR, USA, August 13-16, 2018},
  pages        = {60:1--60:10},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3225058.3225093},
  doi          = {10.1145/3225058.3225093},
  timestamp    = {Mon, 26 Jun 2023 20:40:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icpp/YanJSST18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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