BibTeX record conf/hotchips/GuoSQYHWY16

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@inproceedings{DBLP:conf/hotchips/GuoSQYHWY16,
  author       = {Kaiyuan Guo and
                  Lingzhi Sui and
                  Jiantao Qiu and
                  Song Yao and
                  Song Han and
                  Yu Wang and
                  Huazhong Yang},
  title        = {From model to {FPGA:} Software-hardware co-design for efficient neural
                  network acceleration},
  booktitle    = {2016 {IEEE} Hot Chips 28 Symposium (HCS), Cupertino, CA, USA, August
                  21-23, 2016},
  pages        = {1--27},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/HOTCHIPS.2016.7936208},
  doi          = {10.1109/HOTCHIPS.2016.7936208},
  timestamp    = {Fri, 20 Nov 2020 16:16:07 +0100},
  biburl       = {https://dblp.org/rec/conf/hotchips/GuoSQYHWY16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}