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BibTeX record conf/ets/WaliDVBGR16
@inproceedings{DBLP:conf/ets/WaliDVBGR16, author = {Imran Wali and Bastien Deveautour and Arnaud Virazel and Alberto Bosio and Patrick Girard and Matteo Sonza Reorda}, title = {A low-cost susceptibility analysis methodology to selectively harden logic circuits}, booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands, May 23-27, 2016}, pages = {1--2}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ETS.2016.7519296}, doi = {10.1109/ETS.2016.7519296}, timestamp = {Tue, 21 Mar 2023 20:55:30 +0100}, biburl = {https://dblp.org/rec/conf/ets/WaliDVBGR16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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