BibTeX record conf/cases/DavisBGSFRCUWT15

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@inproceedings{DBLP:conf/cases/DavisBGSFRCUWT15,
  author       = {B. Davis and
                  Ryan Baird and
                  Peter Gavin and
                  Magnus Sj{\"{a}}lander and
                  Ian Finlayson and
                  F. Rasapour and
                  G. Cook and
                  Gang{-}Ryung Uh and
                  David B. Whalley and
                  Gary S. Tyson},
  editor       = {Ravi Iyer and
                  Siddharth Garg},
  title        = {Scheduling instruction effects for a statically pipelined processor},
  booktitle    = {2015 International Conference on Compilers, Architecture and Synthesis
                  for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
                  4-9, 2015},
  pages        = {167--176},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/CASES.2015.7324557},
  doi          = {10.1109/CASES.2015.7324557},
  timestamp    = {Sat, 19 Oct 2019 20:09:45 +0200},
  biburl       = {https://dblp.org/rec/conf/cases/DavisBGSFRCUWT15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}