BibTeX record conf/asscc/LeeLLCC17

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@inproceedings{DBLP:conf/asscc/LeeLLCC17,
  author    = {Chia{-}Fu Lee and
               Hon{-}Jarn Lin and
               Chiu{-}Wang Lien and
               Yu{-}Der Chih and
               Tsung{-}Yung Jonathan Chang},
  title     = {A 1.4Mb 40-nm embedded ReRAM macro with 0.07um\({}^{\mbox{2}}\) bit
               cell, 2.7mA/100MHz low-power read and hybrid write verify for high
               endurance application},
  booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2017, Seoul,
               Korea (South), November 6-8, 2017},
  pages     = {9--12},
  year      = {2017},
  crossref  = {DBLP:conf/asscc/2017},
  url       = {https://doi.org/10.1109/ASSCC.2017.8240203},
  doi       = {10.1109/ASSCC.2017.8240203},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/asscc/LeeLLCC17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asscc/2017,
  title     = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2017, Seoul,
               Korea (South), November 6-8, 2017},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/8226344/proceeding},
  isbn      = {978-1-5386-3178-2},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/asscc/2017},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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