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BibTeX record conf/aspdac/PhamABBGHHJKKKLLNPPPPRVWWW06
@inproceedings{DBLP:conf/aspdac/PhamABBGHHJKKKLLNPPPPRVWWW06, author = {Dac C. Pham and Hans{-}Werner Anderson and Erwin Behnen and Mark Bolliger and Sanjay Gupta and H. Peter Hofstee and Paul E. Harvey and Charles R. Johns and James A. Kahle and Atsushi Kameyama and John M. Keaty and Bob Le and Sang Lee and Tuyen V. Nguyen and John G. Petrovick and Mydung Pham and Juergen Pille and Stephen D. Posluszny and Mack W. Riley and Joseph Verock and James D. Warnock and Steve Weitzel and Dieter F. Wendel}, editor = {Fumiyasu Hirose}, title = {Key features of the design methodology enabling a multi-core SoC implementation of a first-generation {CELL} processor}, booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation: {ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006}, pages = {871--878}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/ASPDAC.2006.1594796}, doi = {10.1109/ASPDAC.2006.1594796}, timestamp = {Fri, 15 Oct 2021 12:30:11 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/PhamABBGHHJKKKLLNPPPPRVWWW06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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