BibTeX record conf/asicon/LuWXM13

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@inproceedings{DBLP:conf/asicon/LuWXM13,
  author       = {Jieliang Lu and
                  Qin Wang and
                  Jing Xie and
                  Zhigang Mao},
  title        = {TSVs-aware floorplanning for 3D integrated circuit},
  booktitle    = {{IEEE} 10th International Conference on ASIC, {ASICON} 2013, Shenzhen,
                  China, October 28-31, 2013},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ASICON.2013.6812068},
  doi          = {10.1109/ASICON.2013.6812068},
  timestamp    = {Fri, 26 Jun 2020 07:59:19 +0200},
  biburl       = {https://dblp.org/rec/conf/asicon/LuWXM13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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