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Hang-Geun Jeong

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2020 – today

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2020
[c2]
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Hee-Yeon Yang, Yu-Jin Noh, Sung-Ho Lee, Geun-Won Kim, Hang-Geun Jeong, Donggu Im:
A Current-link CMOS Analog Neuron with Simplified Synapse Using a Merged Switch Array. ISOCC 2020: 77-78
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So-Hyeon Park, Jae-Hee Lee, Hang-Geun Jeong, Donggu Im:
Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks. ISOCC 2020: 250-251

2000 – 2009

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2009
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Ki-Sang Jung, Kang-Jik Kim, Yong-Eun Kim, Jin-Gyun Chung, Ki-Hyun Pyun, Jong-Yeol Lee, Hang-Geun Jeong, Seong Ik Cho:
The ROM Design with Half Grouping Compression Method for Chip Area and Power Consumption Reduction. IEICE Trans. Electron. 92-C(3): 352-355 (2009)

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