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2000 – 2009
- 2004
[c12]R. Dean Adams, Robert Abbott, Xiaoliang Bai, Dwayne Burek, Eric MacDonald:
An Integrated Memory Self Test and EDA Solution. MTDT 2004: 92-95- 2002
- [c11]Robert Gibbins, R. Dean Adams, Thomas J. Eckenrode, Michael Ouellette, Yuejian Wu:
Design and Test of a 9-port SRAM for a 100Gb/s STS-1 Switch. MTDT 2002: 83- - 2001
- [c10]Pradeep Nagaraj, Shambhu Upadhaya, Kamran Zarrineh, R. Dean Adams:
Defect Analysis and a New Fault Model for Multi-port SRAMs. DFT 2001: 366-374 - [c9]Harold Pilo, R. Dean Adams, Robert E. Busch, Eric A. Nelson, Geoerge E. Rudgers:
Bitline contacts in high density SRAMs: design for testability and stressability. ITC 2001: 776-782 - 2000
- [c8]Kamran Zarrineh, R. Dean Adams, Thomas J. Eckenrode, Steven P. Gregor:
Self test architecture for testing complex memory structures. ITC 2000: 547-556 - [c7]Kamran Zarrineh, R. Dean Adams, Aneesha P. Deo:
Defect Analysis and Realistic Fault Model Extensions for Static Random Access Memories. MTDT 2000: 119-124 - [c6]R. Dean Adams, Phil Shephard III:
Silicon-on-Insulator Technology Impacts on SRAM Testing. VTS 2000: 43-48
1990 – 1999
- 1999
- [c5]R. Dean Adams, Edmond S. Cooley:
The Limits of Digital Testing for Dynamic Circuits. VTS 1999: 28-33 - 1998
- [c4]R. Dean Adams, Edmond S. Cooley, Patrick R. Hansen:
Quad DCVS dynamic logic fault modeling and testing. ITC 1998: 356-362 - 1997
- [c3]R. Dean Adams, Edmond S. Cooley, Patrick R. Hansen:
A Self-Test Circuit for Evaluating Memory Sense-Amplifier Signal. ITC 1997: 217-225 - 1995
- [c2]R. Dean Adams, John Connor, Garret S. Koch, Luigi Ternullo Jr.:
A 370-MHz memory built-in self-test state machine. ED&TC 1995: 139-143 - [c1]Luigi Ternullo Jr., R. Dean Adams, John Connor, Garret S. Koch:
Deterministic Self-Test of a High-Speed Embedded Memory and Logic Processor Subsystem. ITC 1995: 33-44
Coauthor Index
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