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Kusum Lata 0001
Person information
- affiliation: LNM Institute of Information Technology, Jaipur, Rajasthan, India
Other persons with the same name
- Kusum Lata 0002 — National Institute of Technology, Hamirpur, Himachal Pradesh, India
- Kusum Lata 0003 — Delhi Technological University, Delhi, India
- Kusum Lata 0004 — Shri Ramswaroop Memorial University, Barabanki, India
- Kusum Lata 0005 — Sharda University, India
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2020 – today
- 2024
- [c18]Kusum Lata, Prashant Singh, Sandeep Saini:
Exploring Model Poisoning Attack to Convolutional Neural Network Based Brain Tumor Detection Systems. ISQED 2024: 1-7 - 2023
- [j6]Kusum Lata, Linga Reddy Cenkeramaddi:
FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis. Cryptogr. 7(4): 55 (2023) - [c17]Prashant Singh, Kusum Lata, Yash Gupta, Greek Sachdeva, Sandeep Saini:
Enhancing Privacy-Preserving Brain Tumor Detection in Medical Cyber-Physical Systems through Deep Learning Algorithms. iSES 2023: 180-185 - 2022
- [j5]Kusum Lata, Surbhi Chhabra, Sandeep Saini:
Hardware-Software Co-Design Framework for Data Encryption in Image Processing Systems for the Internet of Things Environment. IEEE Consumer Electron. Mag. 11(4): 92-97 (2022) - [j4]Surbhi Chhabra, Kusum Lata:
Hardware obfuscation of AES IP core using combinational hardware Trojan circuit for secure data transmission in IoT applications. Concurr. Comput. Pract. Exp. 34(21) (2022) - [j3]Surbhi Chhabra, Kusum Lata:
Towards the enhancement of AES IP security using hardware obfuscation technique: A practical approach for secure data transmission in IoT. Secur. Priv. 5(4) (2022) - [j2]Surbhi Chhabra, Kusum Lata:
Hardware Obfuscation of AES IP Core Using PUFs and PRNG: A Secure Cryptographic Key Generation Solution for Internet-of-Things Applications. SN Comput. Sci. 3(4): 303 (2022) - 2021
- [c16]Kusum Lata, Abhishek Bansal:
Timing Side-Channel Attack Resistant Key Derivation Functions for Cryptosystems. iSES 2021: 395-399 - [c15]Surbhi Chhabra, Kusum Lata:
Key-based Obfuscation using HT-like Trigger Circuit for 128-bit AES Hardware IP Core. SoCC 2021: 164-169 - [c14]Ayushparth Sharma, Kusum Lata:
Reconfigurable HW-SW Co-design Platform for Lung Cancer Detection and Classification. VLSID 2021: 157-162 - [i2]Kusum Lata, Surbhi Chhabra, Sandeep Saini:
Hardware Software Co-design framework for Data Encryption in Image Processing Systems for the Internet of Things Environmen. CoRR abs/2111.14370 (2021) - 2020
- [c13]Kusum Lata, Sandeep Saini:
Hardware Software Co-Simulation of an AES-128 based Data Encryption in Image Processing Systems for the Internet of Things Environment. iSES 2020: 260-264 - [c12]Surbhi Chhabra, Vishakha Dhanwani, Vikas Kumar Dhaka, Kusum Lata:
Design and Analysis of Secure One-way Functions for the Protection of Symmetric Key Cryptosystems. VDAT 2020: 1-6
2010 – 2019
- 2019
- [c11]Surbhi Chhabra, Kusum Lata:
Key-Based Obfuscation Using Strong Physical Unclonable Function: A Secure Implementation. HIS 2019: 398-408 - 2018
- [c10]Mohita Jaiswal, Kusum Lata:
Hardware Implementation of Text Encryption using Elliptic Curve Cryptography over 192 bit Prime Field. ICACCI 2018: 343-349 - [c9]Aastha Bhardwaj, Surbhi Chhabra, Kusum Lata:
FPGA Implementation of Traffic Light Controller and its Analysis in the Presence of Hardware Trojan. ICACCI 2018: 375-380 - [c8]Surbhi Chhabra, Kusum Lata:
Enhancing Data Security using Obfuscated 128-bit AES Algorithm - An Active Hardware Obfuscation Approach at RTL Level. ICACCI 2018: 401-406 - [c7]Surbhi Chhabra, Kusum Lata:
Hardware Software Co-Simulation of Obfuscated 128-Bit AES Algorithm for Image Processing Applications. iSES 2018: 191-194 - 2017
- [c6]Priyanka Gupta, Sandeep Saini, Kusum Lata:
Securing qr codes by rsa on fpga. ICACCI 2017: 2289-2295 - [c5]Surbhi Chhabra, Kusum Lata:
Analysis of aes cryptosystem in the existence of hardware trojan. ICACCI 2017: 2335-2341 - 2016
- [c4]Ayushparth Sharma, Kusum Lata:
Low-leakage and process-variation-tolerant write-read disturb-free 9T SRA cell using CMOS and FinFETs. ISQED 2016: 205-210 - 2013
- [j1]Kusum Lata, Subir K. Roy:
Formal Verification of Analog and Mixed Signal Designs Using SPICE Circuit Simulation Traces. J. Electron. Test. 29(5): 715-740 (2013) - 2010
- [c3]Kusum Lata, H. S. Jamadagni:
Formal verification of tunnel diode oscillator with temperature variations. ASP-DAC 2010: 217-222 - [c2]Kusum Lata, H. S. Jamadagni:
Formal verification of Full-Wave Rectifier using SPICE circuit simulation traces. ISQED 2010: 264-270
2000 – 2009
- 2009
- [i1]Kusum Lata, H. S. Jamadagni:
Formal Verification of Full-Wave Rectifier: A Case Study. CoRR abs/0909.5393 (2009) - 2008
- [c1]Sukumar Jairam, Kusum Lata, Subir K. Roy, Navakanta Bhat:
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches. ICECS 2008: 910-913
Coauthor Index
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last updated on 2024-09-05 02:08 CEST by the dblp team
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