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ORCIDWoradorn Wattanapanitch
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2020 – today
- 2023
[j12]Siwakorn Thongmark
, Woradorn Wattanapanitch:
Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips. IEEE Access 11: 122566-122585 (2023)- [j11]Kanisorn Watcharapongvinit, Intouch Yongpanich, Woradorn Wattanapanitch:
Design of a Low-Power Ground-Free Analog Front End for ECG Acquisition. IEEE Trans. Biomed. Circuits Syst. 17(2): 299-311 (2023) - 2022
- [j10]Tanachai Limpisawas, Woradorn Wattanapanitch:
A Low-Power Wide-Load-Range Output-Capacitorless Low-Dropout Voltage Regulator With Indirect-Direct Nested Miller Compensation. IEEE Access 10: 67396-67412 (2022) - [j9]A. J. Cressman, Woradorn Wattanapanitch, I. Chuang, Rahul Sarpeshkar:
Formulation and Emulation of Quantum-Inspired Dynamical Systems With Classical Analog Circuits. Neural Comput. 34(4): 856-890 (2022) - 2020
- [j8]Chinnatip Ratametha, Samattachai Tepwimonpetkun, Woradorn Wattanapanitch:
A 2.64-µW 71-dB SNDR Discrete-Time Signal-Folding Amplifier for Reducing ADC's Resolution Requirement in Wearable ECG Acquisition Systems. IEEE Trans. Biomed. Circuits Syst. 14(1): 48-64 (2020)
2010 – 2019
- 2019
- [j7]Bhirawich Pholpoke, Techapon Songthawornpong, Woradorn Wattanapanitch:
A Micropower Motion Artifact Estimator for Input Dynamic Range Reduction in Wearable ECG Acquisition Systems. IEEE Trans. Biomed. Circuits Syst. 13(5): 1021-1035 (2019) - 2018
- [j6]Pakorn Prasopsin, Woradorn Wattanapanitch:
A Sub-Microwatt Class-AB Super Buffer: Frequency Compensation for Settling-Time Improvement. IEEE Trans. Circuits Syst. II Express Briefs 65-II(1): 26-30 (2018) - [c4]Chinnatip Ratametha, Chanoknan Buaban, Bhirawich Pholpoke, Tanachai Limpisawas, Pakorn Prasopsin, Samattachai Tepwimonpetkun, Woradorn Wattanapanitch:
A Low-Power High-Input-Impedance 70-dB Gain ECG Readout System with High Interference Tolerance. BioCAS 2018: 1-4 - 2017
- [j5]Pakorn Prasopsin, Woradorn Wattanapanitch:
Design of a low-power high open-loop gain operational amplifier for capacitively-coupled instrumentation amplifiers. Int. J. Circuit Theory Appl. 45(11): 1552-1575 (2017) - 2016
- [j4]Samattachai Tepwimonpetkun, Bhirawich Pholpoke, Woradorn Wattanapanitch:
Graphical analysis and design of multistage operational amplifiers with active feedback Miller compensation. Int. J. Circuit Theory Appl. 44(3): 562-583 (2016) - 2014
- [c3]Pakorn Prasopsin, Bhirawich Pholpoke, Samattachai Tepwimonpetkun, Woradorn Wattanapanitch:
A compact low-power mixed-signal architecture for powerline interference rejection in biopotential analog front ends. BioCAS 2014: 196-199 - 2011
- [b1]Woradorn Wattanapanitch:
An ultra low power implantable neural recording system for brain-machine interfaces. Massachusetts Institute of Technology, Cambridge, MA, USA, 2011 - [j3]Woradorn Wattanapanitch, Rahul Sarpeshkar:
A Low-Power 32-Channel Digitally Programmable Neural Recording Integrated Circuit. IEEE Trans. Biomed. Circuits Syst. 5(6): 592-602 (2011)
2000 – 2009
- 2008
- [j2]Rahul Sarpeshkar, Woradorn Wattanapanitch, Scott K. Arfin, Benjamin I. Rapoport, Soumyajit Mandal, Michael W. Baker, Michale S. Fee, Sam Musallam, Richard A. Andersen:
Low-Power Circuits for Brain-Machine Interfaces. IEEE Trans. Biomed. Circuits Syst. 2(3): 173-183 (2008) - [c2]Paul C. P. Chen, Anand Pappu, Zhongtao Fu, Woradorn Wattanapanitch, Alyssa B. Apsel:
A 10 Gb/s optical receiver in 0.25 µm silicon-on-sapphire CMOS. ISCAS 2008: 193-196 - 2007
- [j1]Woradorn Wattanapanitch, Michale S. Fee, Rahul Sarpeshkar:
An Energy-Efficient Micropower Neural Recording Amplifier. IEEE Trans. Biomed. Circuits Syst. 1(2): 136-147 (2007) - [c1]Rahul Sarpeshkar, Woradorn Wattanapanitch, Benjamin I. Rapoport, Scott K. Arfin, Michael W. Baker, Soumyajit Mandal, Michale S. Fee, Sam Musallam, Richard A. Andersen:
Low-Power Circuits for Brain-Machine Interfaces. ISCAS 2007: 2068-2071
Coauthor Index
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