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ORCIDFrançois Andrieu
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2020 – today
- 2024
[c42]Olivier Billoint, Simon Martin, J. Laguerre, L. Hosier, Jean Coignus, Catherine Carabasse, François Andrieu, Laurent Grenouillet:
Charge-based Sense Demonstration in 1T-1C HZO FeRAM Arrays to Overcome CBL-induced Bank Size Limitations. IMW 2024: 1-4- [c41]Papavramidou Panagiota, Sebastien Ricavy, Christopher Mounet, Carine Jahan, Niccolo Castellani, François Andrieu:
A synergistic fault tolerance framework for Mbit 28nm embedded RRAM. IOLTS 2024: 1-7 - [c40]J. Laguerre, Simon Martin, Jean Coignus, Catherine Carabasse, Marc Bocquet, François Andrieu, Laurent Grenouillet:
Data Retention Insights from Joint Analysis on BEOL-Integrated HZO-Based Scaled FeCAPs and 16kbit 1T-1C FeRAM Arrays. IRPS 2024: 1-7 - [c39]J. Luge-Alvarez, J. B. David, Alexandre Siligaris, Vincent Puyal, G. Moritz, Tadeu Mota Frutuoso, V. Lapras, Claire Fenouillet-Béranger, Laurent Brunet, P. Vincent, Didier Lattard, Xavier Garros, François Andrieu, Perrine Batude:
First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c38]Mona Ezzadeen, Atreya Majumdar, Sigrid Thomas, Jean-Philippe Noël, Bastien Giraud, Marc Bocquet, François Andrieu, Damien Querlioz, Jean-Michel Portal:
Binary ReRAM-based BNN first-layer implementation. DATE 2023: 1-6 - [c37]T. Dubreuil, Sylvain Barraud, J.-M. Pedini, Jean-Michel Hartmann, F. Boulard, A. Sarrazin, A. Gharbi, Johannes Sturm, A. Lambert, S. Martin, Niccolo Castellani, A. Anotta, A. Magalhaes-Lucas, Aurelie Souhaite, François Andrieu:
Integration of HfO2-based 3D OxRAM with GAA stacked-nanosheet transistor for high-density embedded memory. ESSDERC 2023: 117-120 - [c36]J. Laguerre, Marc Bocquet, Olivier Billoint, Simon Martin, Jean Coignus
, Catherine Carabasse, Thomas Magis, T. Dewolf, François Andrieu, Laurent Grenouillet:
Memory Window in Si: HfO2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced Nodes. IMW 2023: 1-4 - [c35]Laurent Grenouillet, Justine Barbot, J. Laguerre, Simon Martin, Catherine Carabasse, M. Louro, Messaoud Bedjaoui, S. Minoret, S. Kerdilès, C. Boixaderas, Thomas Magis, Carine Jahan, François Andrieu, Jean Coignus:
Reliability assessment of hafnia-based ferroelectric devices and arrays for memory and AI applications (Invited). IRPS 2023: 1-8 - [c34]Lucas Reganaz, Damien Deleruyelle, Quentin Rafhay, Joel Minguet Lopez, Niccolo Castellani, Jean-François Nodin, Alessandro Bricalli, Giuseppe Piccolboni, Gabriel Molas, François Andrieu:
Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliability. IRPS 2023: 1-6 - [c33]Joel Minguet Lopez, Manon Dampfhoffer, Tifenn Hirtzlin, Lucas Reganaz, Laurent Grenouillet, Gabriele Navarro, Mathieu Bernard, Thomas Magis, Catherine Carabasse, Niccolo Castellani, Valentina Meli, Elisa Vianello, Damien Deleruyelle, Jean-Michel Portal, Gabriel Molas, François Andrieu:
1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation. MIXDES 2023: 1-6 - [i4]Fadi Jebali, Atreya Majumdar, Clement Türck, Kamel-Eddine Harabi, Mathieu-Coumba Faye, Eloi Muhr, Jean-Pierre Walder, Oleksandr Bilousov, Amadeo Michaud, Elisa Vianello, Tifenn Hirtzlin, François Andrieu, Marc Bocquet, Stéphane Collin, Damien Querlioz, Jean-Michel Portal:
Powering AI at the Edge: A Robust, Memristor-based Binarized Neural Network with Near-Memory Computing and Miniaturized Solar Cell. CoRR abs/2305.12875 (2023) - 2022
- [c32]Justine Barbot, Jean Coignus, Nicolas Vaxelaire, Catherine Carabasse, Olivier Glorieux, Messaoud Bedjaoui, François Aussenac, François Andrieu, François Triozon, Laurent Grenouillet:
Interplay between charge trapping and polarization switching in MFDM stacks evidenced by frequency-dependent measurements. ESSCIRC 2022: 125-128 - [c31]Ahmed Trabelsi, Carlo Cagli, Tifenn Hirtzlin, Olga Cueto, Marie Claire Cyrille, Elisa Vianello, Valentina Meli, Veronique Sousa, Guillaume Bourgeois, François Andrieu:
Frequency modulation of conductance level in PCM device for neuromorphic applications. ESSCIRC 2022: 129-132 - [c30]Camille Laguna, Mathieu Bernard, Julien Garrione, Niccolo Castellani, Valentina Meli, S. Martin, François Aussenac, D. Rouchon, N. Rochat, Emmanuel Nolot, Guillaume Bourgeois, Marie Claire Cyrille, Liviu Militaru, A. Souifi, François Andrieu, Gabriele Navarro:
Multilayer Structure in SeAsGeSi-based OTS for High Thermal Stability and Reliability Enhancement. ESSDERC 2022: 225-228 - [c29]C. De Camaret, Guillaume Bourgeois, Olga Cueto, Valentina Meli, S. Martin, D. Despois, V. Beugin, Niccolo Castellani, Marie Claire Cyrille, François Andrieu, Julien Arcamone, Y. Le-Friec, Gabriele Navarro:
Enhanced Thermal Confinement in Phase-Change Memory Targeting Current Reduction. ESSDERC 2022: 233-236 - [c28]Giusy Lama, Mathieu Bernard, Julien Garrione, Nicolas Bernier, Niccolo Castellani, Guillaume Bourgeois, Marie Claire Cyrille, François Andrieu, Gabriele Navarro:
TiTe/Ge2Sb2Te5Bi-layer-based Phase-Change Memory Targeting Storage Class Memory. ESSDERC 2022: 237-240 - [c27]T. Dubreuil, P. Amari, Sylvain Barraud, Joris Lacord, Eduardo Esmanhotto, Valentina Meli, S. Martin, Niccolo Castellani, Bernard Previtali, François Andrieu:
A novel 3D 1T1R RRAM architecture for memory-centric Hyperdimensional Computing. IMW 2022: 1-4 - [c26]Joel Minguet Lopez, François Rummens, Lucas Reganaz, A. Heraud, Tifenn Hirtzlin, Laurent Grenouillet, Gabriele Navarro, Mathieu Bernard, Catherine Carabasse, Niccolo Castellani, Valentina Meli, S. Martin, Thomas Magis, Elisa Vianello, C. Sabbione, Damien Deleruyelle, Marc Bocquet, Jean-Michel Portal, Gabriel Molas, François Andrieu:
1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing. IMW 2022: 1-4 - [c25]Gabriel Molas, Giuseppe Piccolboni, Alessandro Bricalli, Anthonin Verdy, I. Naot, Y. Cohen, Amir Regev, I. Naveh, Damien Deleruyelle, Quentin Rafhay, Niccolo Castellani, Lucas Reganaz, Alain Persico, R. Segaud, Jean-François Nodin, Valentina Meli, S. Martin, François Andrieu, Laurent Grenouillet:
High temperature stability embedded ReRAM for 2x nm node and beyond. IMW 2022: 1-4 - [c24]Gabriele Navarro, C. Sabbione, Valentina Meli, L. E. Nistor, M. Frei, Julien Garrione, M. Tessaire, F. Fillot, Nicolas Bernier, Emmanuel Nolot, Benoit Sklénard, J. Li, S. Martin, Niccolo Castellani, Guillaume Bourgeois, Marie Claire Cyrille, François Andrieu:
Multilayer Deposition in Phase-Change Memory for Best Endurance Performance and Reduced Bit Error Rate. IMW 2022: 1-4 - [c23]Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, S. Martin, Bastien Giraud, François Andrieu, Jean-François Nodin, Damien Querlioz, Jean-Michel Portal, Elisa Vianello:
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations. IRPS 2022: 8-1 - [c22]Filippo Moro, Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, Ahmed Trabelsi, Thomas Dalgaty, Gabriel Molas, François Andrieu, Stefano Brivio, Sabina Spiga, Giacomo Indiveri, Melika Payvand, Elisa Vianello:
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks. ISCAS 2022: 380-383 - [i3]Filippo Moro, Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, Ahmed Trabelsi, Thomas Dalgaty, Gabriel Molas, François Andrieu, Stefano Brivio, Sabina Spiga, Giacomo Indiveri, Melika Payvand, Elisa Vianello:
Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks. CoRR abs/2202.05094 (2022) - [i2]Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, S. Martin, Bastien Giraud, François Andrieu, Jean-Francois Nodin, Damien Querlioz, Jean-Michel Portal, Elisa Vianello:
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations. CoRR abs/2203.01680 (2022) - 2021
- [c21]Mona Ezzadeen, Atreya Majumdar, Marc Bocquet, Bastien Giraud, Jean-Philippe Noël, François Andrieu, Damien Querlioz, Jean-Michel Portal:
Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges. ESSCIRC 2021: 83-86 - [c20]Mona Ezzadeen, Atreya Majumdar, Marc Bocquet, Bastien Giraud, Jean-Philippe Noël, François Andrieu, Damien Querlioz, Jean-Michel Portal:
Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges. ESSDERC 2021: 83-86 - [c19]Tadeu Mota Frutuoso, Jose Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, Louis Gerrer, Mikaël Cassé, Edoardo Catapano, Claire Fenouillet-Béranger, François Andrieu, Fred Gaillard, Philippe Ferrari:
Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration. IRPS 2021: 1-5 - 2020
- [i1]Mona Ezzadeen, D. Bosch, Bastien Giraud, Sylvain Barraud, Jean-Philippe Noël, Didier Lattard, Joris Lacord, Jean-Michel Portal, François Andrieu:
Ultra-High-density 3D vertical RRAM with stacked JunctionLess nanowires for In-Memory-Computing applications. CoRR abs/2012.00061 (2020)
2010 – 2019
- 2018
- [c18]François Andrieu, Perrine Batude, Laurent Brunet, Claire Fenouillet-Béranger, Didier Lattard, Sébastien Thuries, Olivier Billoint, Richard Fournel, Maud Vinet:
A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit. ICICDT 2018: 141-144 - 2017
- [c17]Claire Fenouillet-Béranger, S. Beaurepaire, Fabien Deprat, Alexandre Ayres De Sousa, Laurent Brunet, Perrine Batude, Olivier Rozeau, François Andrieu, Paul Besombes, M.-P. Samson, Bernard Previtali, F. Nemouchi, G. Rodriguez, Philippe Rodriguez, R. Famulok, Nils Rambal, Viorel Balan, Z. Saghi, V. Jousseaume, Charles-Antoine Guérin, F. Ibars, F. Proud, D. Nouguier, David Ney, V. Delaye, H. Dansas, X. Federspiel, Maud Vinet:
Guidelines for intermediate back end of line (BEOL) for 3D sequential integration. ESSDERC 2017: 252-255 - [c16]Melanie Brocard, Benoît Mathieu, Jean-Philippe Colonna, Cristiano Santos, Claire Fenouillet-Béranger, Cao-Minh Vincent Lu, Gerald Cibrario, Laurent Brunet, Perrine Batude, François Andrieu, Sébastien Thuries, Olivier Billoint:
Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells. ISVLSI 2017: 539-544 - 2016
- [c15]R. Berthelon, François Andrieu, P. Perreau, E. Baylac, A. Pofelski, Emmanuel Josse, Didier Dutartre, A. Claverie, Michel Haond:
Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration. ESSDERC 2016: 127-130 - [c14]Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint:
Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. ESSDERC 2016: 218-221 - [c13]Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Guillaume Berhault, Cristiano Lopes Dos Santos, Gerald Cibrario, Fabien Clermidy, Daniel Gitlin, Olivier Faynot:
Opportunities brought by sequential 3D CoolCube™ integration. ESSDERC 2016: 226-229 - [c12]Claire Fenouillet-Béranger, Perrine Batude, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, M.-P. Samson, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Gerald Cibrario, Maud Vinet:
Recent advances in 3D VLSI integration. ICICDT 2016: 1-4 - 2015
- [c11]Guillaume Besnard, Xavier Garros, Alexandre Subirats, François Andrieu, X. Federspiel, M. Rafik, Walter Schwarzenbach, Gilles Reimbold, Olivier Faynot, Sorin Cristoloveanu:
Performance and reliability of strained SOI transistors for advanced planar FDSOI technology. IRPS 2015: 2 - 2014
- [c10]François Andrieu, Mikaël Cassé, E. Baylac, P. Perreau, O. Nier, Denis Rideau, R. Berthelon, Franck Pourchon, A. Pofelski, Barbara De Salvo, C. Gallon, Vincent Mazzocchi, D. Barge, C. Gaumer, O. Gourhant, A. Cros, Vincent Barral, Rossella Ranica, Nicolas Planes, Walter Schwarzenbach, E. Richard, Emmanuel Josse, Olivier Weber, Franck Arnaud, Maud Vinet, Olivier Faynot, Michel Haond:
Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs. ESSDERC 2014: 106-109 - [c9]Guillaume Besnard, Xavier Garros, François Andrieu, Phuong Nguyen, William van den Daele, Patrick Reynaud, Walter Schwarzenbach, Daniel Delprat, Konstantin Bourdelle, Gilles Reimbold, Sorin Cristoloveanu:
Superior performance and Hot Carrier reliability of Strained FDSOI nMOSFETs for advanced CMOS technology nodes. ESSDERC 2014: 226-229 - [c8]Carlos Navarro, Maryline Bawedin, François Andrieu, Jacques Cluzel, Xavier Garros, Sorin Cristoloveanu:
CMOS VT characterization by capacitance measurements in FDSOI PIN gated diodes. ESSDERC 2014: 405-408 - [c7]J. Mazurier, Olivier Weber, François Andrieu, Cyrille Le Royer, Olivier Faynot, Maud Vinet:
Variability of planar Ultra-Thin Body and Buried oxide (UTBB) FDSOI MOSFETs. ICICDT 2014: 1-4 - 2013
- [c6]Sergej Makovejev, Babak Kazemi Esfeh, Jean-Pierre Raskin, Denis Flandre, Valeria Kilchytska, François Andrieu:
Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB mosfets. ESSDERC 2013: 194-197 - [c5]Carlos Navarro, Maryline Bawedin, François Andrieu, Bruno Sagnes, Sorin Cristoloveanu:
Why are SCE overestimated in FD-SOI MOSFETs? ESSDERC 2013: 304-307 - 2012
- [j1]J. Mazurier, Olivier Weber, François Andrieu, Alain Toffoli, Olivier Thomas, Fabienne Allain, Jean-Philippe Noel, Marc Belleville, Olivier Faynot, T. Poiroux:
Ultra-Thin Body and Buried Oxide (UTBB) FDSOI Technology with Low Variability and Power Management Capability for 22 nm Node and Below. J. Low Power Electron. 8(1): 125-132 (2012) - [c4]Carlos Navarro, Noel Rodriguez, Luca Donetti, Akiko Oliata, Francisco Gámiz, François Andrieu, Olivier Faynot, Claire Fenouillet-Béranger, Sorin Cristoloveanu:
Multibranch mobility characterization: Evidence of carrier mobility enhancement by back-gate biasing in FD-SOI MOSFET. ESSDERC 2012: 209-212 - [c3]Valeria Kilchytska, Denis Flandre, François Andrieu:
On the UTBB SOI MOSFET performance improvement in quasi-double-gate regime. ESSDERC 2012: 246-249 - 2010
- [c2]Olivier Thomas, Jean-Philippe Noel, Claire Fenouillet-Béranger, Marie-Anne Jaud, J. Dura, P. Perreau, Frédéric Boeuf, François Andrieu, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Andrei Vladimirescu, Amara Amara:
32nm and beyond Multi-VT Ultra-Thin Body and BOX FDSOI: From device to circuit. ISCAS 2010: 1703-1706
2000 – 2009
- 2009
- [c1]Claire Fenouillet-Béranger, P. Perreau, S. Denorme, L. Tosti, François Andrieu, Olivier Weber, S. Barnola, C. Arvet, Y. Campidelli, Sébastien Haendler, R. Beneyton, C. Perrot, C. de Buttet, P. Gros, Loan Pham-Nguyen, F. Leverd, P. Gouraud, F. Abbate, F. Baron, A. Torres, C. Laviron, L. Pinzelli, J. Vetier, C. Borowiak, A. Margain, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Olivier Faynot, Thomas Skotnicki:
Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below. ESSCIRC 2009: 88-91
Coauthor Index
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