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Koutaro Hachiya
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2020 – today
- 2023
- [j14]Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa:
A parabolic spiral coil transmitter with uniform magnetic field for smart devices. IEICE Electron. Express 20(1): 20220492 (2023) - [j13]Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa:
Bayesian neural network based inductance calculations of wireless power transfer systems. IEICE Electron. Express 20(5): 20230030 (2023) - [j12]Kyosuke Kusumi, Koutaro Hachiya, Ryotaro Kudo, Toshiki Kanamoto, Atsushi Kurokawa:
Electronic component placement optimization for heat measures of smartglasses. IEICE Electron. Express 20(6): 20230011 (2023) - [c8]Koutaro Hachiya:
Measurement Point Selection Algorithms for Testing Power TSVs. 3DIC 2023: 1-4 - 2022
- [j11]Shinsuke Kashiwazaki, Koutaro Hachiya, Toshiki Kanamoto, Ryosuke Watanabe, Atsushi Kurokawa:
Receiver coil built into belt for heat dissipation of watch-type smart devices. IEICE Electron. Express 19(3): 20210497 (2022) - [j10]Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa:
A bernoulli spiral coil transmitter for charging various small electronic devices. IEICE Electron. Express 19(23): 20220419 (2022) - [c7]Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa:
Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems. GCCE 2022: 222-223 - [c6]Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa:
A Parabolic Spiral Coil Transmitter for Charging Multiple Receivers. GCCE 2022: 224-225 - 2021
- [j9]Kodai Matsuhashi, Koutaro Hachiya, Toshiki Kanamoto, Shinsuke Kashiwazaki, Kyosuke Kusumi, Atsushi Kurokawa:
Effective methods to promote heat dissipation of wrist wearables. IEICE Electron. Express 18(5): 20210017 (2021) - 2020
- [j8]Yuuta Satomi, Koutaro Hachiya, Toshiki Kanamoto
, Ryosuke Watanabe
, Atsushi Kurokawa:
Thermal placement on PCB of components including 3D ICs. IEICE Electron. Express 17(3): 20190737 (2020) - [c5]Koutaro Hachiya:
A Method to Detect Open Defects in Wire Segments of On-Chip Power Grids. ATS 2020: 1-6 - [c4]Koutaro Hachiya, Atsushi Kurokawa:
Testing Through Silicon Vias in Power Distribution Network of 3D-IC with Manufacturing Variability Cancellation. DATE 2020: 290-293
2010 – 2019
- 2019
- [c3]Koutaro Hachiya
, Atsushi Kurokawa:
Variability Cancellation to Improve Diagnostic Performance of Testing through Silicon Vias in Power Distribution Network of 3D-IC. 3DIC 2019: 1-6 - 2010
- [j7]Toshiki Kanamoto
, Takaaki Okumura, Katsuhiro Furukawa, Hiroshi Takafuji, Atsushi Kurokawa, Koutaro Hachiya
, Tsuyoshi Sakata, Masakazu Tanaka, Hidenari Nakashima, Hiroo Masuda, Takashi Sato
, Masanori Hashimoto
:
Impact of Self-Heating in Wire Interconnection on Timing. IEICE Trans. Electron. 93-C(3): 388-392 (2010)
2000 – 2009
- 2009
- [j6]Tsuyoshi Sakata, Takaaki Okumura, Atsushi Kurokawa, Hidenari Nakashima, Hiroo Masuda, Takashi Sato
, Masanori Hashimoto
, Koutaro Hachiya
, Katsuhiro Furukawa, Masakazu Tanaka, Hiroshi Takafuji, Toshiki Kanamoto
:
An Approach for Reducing Leakage Current Variation due to Manufacturing Variability. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3016-3023 (2009) - 2007
- [j5]Koutaro Hachiya
, Takayuki Ohshima, Hidenari Nakashima, Masaaki Soda, Satoshi Goto:
Fast Methods to Estimate Clock Jitter due to Power Supply Noise. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 741-747 (2007) - 2006
- [j4]Koutaro Hachiya
, Hiroyuki Kobayashi, Takaaki Okumura, Takashi Sato
, Hiroki Oka:
A Method to Derive SSO Design Rule Considering Jitter Constraint. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 865-872 (2006) - [j3]Toshiki Kanamoto
, Shigekiyo Akutsu, Tamiyo Nakabayashi, Takahiro Ichinomiya, Koutaro Hachiya
, Atsushi Kurokawa, Hiroshi Ishikawa, Sakae Muromoto, Hiroyuki Kobayashi, Masanori Hashimoto
:
Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3666-3670 (2006) - 2005
- [j2]Achim Basermann
, Uwe Jaekel
, M. Nordhausen, Koutaro Hachiya
:
Parallel iterative solvers for sparse linear systems in circuit simulation. Future Gener. Comput. Syst. 21(8): 1275-1284 (2005) - [j1]Takashi Sato
, Junji Ichimiya, Nobuto Ono, Koutaro Hachiya
, Masanori Hashimoto
:
On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3382-3389 (2005) - [c2]Takashi Sato
, Junji Ichimiya, Nobuto Ono, Koutaro Hachiya, Masanori Hashimoto
:
On-chip thermal gradient analysis and temperature flattening for SoC design. ASP-DAC 2005: 1074-1077
1990 – 1999
- 1997
- [c1]Koutaro Hachiya
, Toshiyuki Saito, Toshiyuki Nakata, Norio Tanabe:
Enhancement of parallelism for tearing-based circuit simulation. ASP-DAC 1997: 493-498
Coauthor Index
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