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ORCIDShahana Thottathikkulam Kassim
Person information
- affiliation: Cochin University of Science and Technology, Kerala, India
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Journal Articles
- 2023
[j8]Basil K. Jeemon
, T. K. Shahana:
PAPR reduction using constrained convex optimization for vector OFDM. Ann. des Télécommunications 78(1-2): 91-99 (2023)- [j7]Pramod Patali, Shahana Thottathikkulam Kassim:
Exact and approximate multiplications for signal processing applications. Microelectron. J. 132: 105688 (2023) - 2021
- [j6]K. B. Jithendra, Shahana Thottathikkulam Kassim:
New results in biclique cryptanalysis of full round GIFT. J. Intell. Fuzzy Syst. 41(5): 5551-5560 (2021) - [j5]Pramod Patali, Shahana Thottathikkulam Kassim:
High throughput and energy efficient linear phase FIR filter architectures. Microprocess. Microsystems 87: 104367 (2021) - 2020
- [j4]Pramod Patali, Shahana Thottathikkulam Kassim:
Efficient modular hybrid adders and Radix-4 booth multipliers for DSP applications. Microelectron. J. 96: 104701 (2020) - [j3]K. B. Jithendra, Shahana Thottathikkulam Kassim:
New Biclique Cryptanalysis on Full-Round PRESENT-80 Block Cipher. SN Comput. Sci. 1(2): 94 (2020) - 2019
- [j2]Pramod Patali, Shahana Thottathikkulam Kassim:
High throughput FIR filter architectures using retiming and modified CSLA based adders. IET Circuits Devices Syst. 13(7): 1007-1017 (2019) - 2017
- [j1]Rijo Sebastian, Jos A. V. Prakash, Babita Roslind Jose, Shahana Thottathikkulam Kassim:
Multi-Stage Noise Shaping ΔΣ Modulator with Enhanced Noise Shaping for Low Power Wideband Applications. J. Low Power Electron. 13(4): 661-668 (2017)
Conference and Workshop Papers
- 2019
- [c10]Preenu Paul, Babita R. Jose, Shahana Thottathikkulam Kassim, Chikku Abraham, Jimson Mathew:
Isolated Switched Boost DC-DC Converter with Coupled Inductor and Transformer. TENCON 2019: 1142-1147 - 2016
- [c9]V. V. Mahesh, T. K. Shahana:
Delay and Area Efficient Sound Wave Decomposition by Nonuniform Filter Bank for Digital Hearing Aids. IntelliSys (1) 2016: 70-78 - [c8]Rijo Sebastian, Jos A. V. Prakash, Babita Roslind Jose, Shahana Thottathikkulam Kassim:
A multi-mode MASH ΣΑ modulator for low power wideband applications. ISED 2016: 87-90 - 2008
- [c7]Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi:
RRNS-Convolutional encoded concatenated code for OFDM based wireless communication. ICON 2008: 1-6 - [c6]Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi:
Dual-mode RNS based programmable decimation filter for WCDMA and WLANa. ISCAS 2008: 952-955 - [c5]Rekha K. James, Shahana Thottathikkulam Kassim, K. Poulose Jacob, Sreela Sasi:
Fixed Point Decimal Multiplication Using RPS Algorithm. ISPA 2008: 343-350 - [c4]Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi:
RNS Based Programmable Multi-Mode Decimation Filter for WCDMA and WiMAX. VTC Spring 2008: 1831-1835 - 2007
- [c3]Shahana Thottathikkulam Kassim, Rekha K. James, K. Poulose Jacob, Sreela Sasi:
Genetic Algorithm-Based Combinational Logic Synthesis Using Universal Logic Modules. ESA 2007: 210-215 - [c2]Rekha K. James, Shahana Thottathikkulam Kassim, K. Poulose Jacob, Sreela Sasi:
A New Look at Reversible Logic Implementation of Decimal Adder. SoC 2007: 1-4 - 2006
- [c1]Rekha K. James, Shahana Thottathikkulam Kassim, K. Poulose Jacob, Sreela Sasi:
Delay-Reduced Combinational Logic Synthesis using Multiplexers. ESA 2006: 105-110
Coauthor Index
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