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Seung H. Hwang

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2000 – 2009

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2000
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Seung H. Hwang, Gwan S. Choi:
A Reliability Testing Environment for Off-the-Shelf Memory Subsystems. IEEE Des. Test Comput. 17(3): 116-124 (2000)

1990 – 1999

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1999
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Seung H. Hwang, Gwan S. Choi:
Selective-set-invalidation (SSI) for soft-error-resilient cache architecture. SIGARCH Comput. Archit. News 27(3): 4-9 (1999)
1998
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Seung H. Hwang, Gwan S. Choi:
On-Chip Cache Memory Resilience. HASE 1998: 240-247

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