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ORCIDTohru Moto-Oka
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1980 – 1989
- 1986
[j10]Shuichi Sakai
, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka:
Interconnection networks for bucket distribution on relational algebra machine GRACE. Syst. Comput. Jpn. 17(5): 45-53 (1986)- [j9]Shinya Fushimi, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka:
Design of secondary storage system of database machine grace using generalized KD-tree. Syst. Comput. Jpn. 17(6): 57-66 (1986) - [c13]Masahiro Fujita, Shinji Kono, Hidehiko Tanaka, Tohru Moto-Oka:
Tokio: Logic Programming Language Based on Temporal Logic and its Compilation to Prolog. ICLP 1986: 695-709 - 1985
- [j8]Shuichi Sakai, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka:
Interconnection network for bucket collection on relational algebra machine GRACE. Syst. Comput. Jpn. 16(5): 79-87 (1985) - [c12]Shinya Fushimi, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka:
Multidimensional Clustering Techniques for Large Relational Database Machines. FODO 1985: 293-308 - [c11]Masaru Kitsuregawa, Shinya Fushimi, Hidehiko Tanaka, Tohru Moto-Oka:
Memory Management Algorithms in Pipeline Merge Sorter. IWDM 1985: 208-232 - [c10]Tsutomu Maruyama, Keiji Hirata, Hidehiko Tanaka, Tohru Moto-Oka:
A Note on the Elementary Execution Unit in a Parallel Inference Machine. LP 1985: 25-34 - [c9]T. Aoyagi, Masahiro Fujita, Tohru Moto-Oka:
Temporal Logic Programming Language Tokio - Programming in Tokio. LP 1985: 128-137 - [c8]Masahiro Fujita, Makoto Ishisone, Hiroshi Nakamura, Hidehiko Tanaka, Tohru Moto-Oka:
Using the Temporal Logic Programming Language Tokio for Algorithm Description and Automatic CMOS Gate Array Synthesis. LP 1985: 246-255 - [c7]Shinya Fushimi, Masaru Kitsuregawa, Masaya Nakayama, Hidehiko Tanaka, Tohru Moto-Oka:
Algorithm and Performance Evaluation of Adaptive Multidimensional Clustering Technique. SIGMOD Conference 1985: 308-318 - 1984
- [j7]Tohru Moto-Oka, Harold S. Stone:
Fifth-Generation Computer Systems: A Japanese Project. Computer 17(3): 6-13 (1984) - [j6]Atsuhiro Goto, Hidehiko Tanaka, Tohru Moto-Oka:
Highly Parallel Inference Engine PIE: Goal Rewriting Model and Machine Architecture. New Gener. Comput. 2(1): 37-58 (1984) - [c6]Tohru Moto-Oka, Hidehiko Tanaka, Hitoshi Aida, Keiji Hirata, Tsutomu Maruyama:
The Architecture of a Parallel Inference Engine - PIE. FGCS 1984: 479-488 - [c5]Masahiro Fujita, Hidehiko Tanaka, Tohru Moto-Oka:
Specifying Hardware in temporal Logic & Efficient Synthesis of State-Diagrams Using Prolog. FGCS 1984: 572-581 - 1983
- [j5]Tohru Moto-Oka:
On the Founding of This Journal. New Gener. Comput. 1(1): 1-2 (1983) - [j4]Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka:
Application of Hash to Data Base Machine and Its Architecture. New Gener. Comput. 1(1): 63-74 (1983) - [j3]Hitoshi Aida, Hidehiko Tanaka, Tohru Moto-Oka:
A Prolog Extension for Handling Negative Knowledge. New Gener. Comput. 1(1): 87-91 (1983) - [j2]Masahiro Fujita, Hidehiko Tanaka, Tohru Moto-Oka:
Temporal Logic Based Hardware Description and Its Verification with Prolog. New Gener. Comput. 1(2): 195-203 (1983) - [c4]Tohru Moto-Oka, Kazuhiro Fuchi:
The Architectures in the Fifth Generation Computers. IFIP Congress 1983: 589-602 - [c3]Tohru Moto-Oka:
Overview to the Fifth Generation Computer System Project. ISCA 1983: 417-422 - 1982
- [c2]Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka:
Relational Algebra Machine GRACE. RIMS Symposium on Software Science and Engineering 1982: 191-214
1970 – 1979
- 1975
- [c1]Tohru Moto-Oka, Tadashi Kurachi, Tsutomu Shiino, Masakatsu Sugimoto:
Logic design system in Japan. DAC 1975: 241-250
1960 – 1969
- 1960
- [j1]Eiichi Goto, Kenro Murata, Kisaburo Nakazawa, Keisuke Nakagawa, Tohru Moto-Oka, Yasushi Miatsu-Oka, Yoshihiro Ishibashi, Haruhisa Ishida, Takashi Soma, Eiiti Wada:
Esaki Diode High-Speed Logical Circuits. IRE Trans. Electron. Comput. 9(1): 25-29 (1960)
Coauthor Index
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