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Tadeusz Tomczak
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Journal Articles
- 2023
- [j5]Tadeusz Tomczak, Mariusz Ksiezyk, Jacek Hanke, Marek Kostur, Maciej Marek
:
Double-precision hardware accelerator for incompressible Navier-Stokes equations solver based on discontinuous Galerkin method. Adv. Eng. Softw. 176: 103393 (2023) - 2019
- [j4]Tadeusz Tomczak
, Roman G. Szafran
:
A new GPU implementation for lattice-Boltzmann simulations on sparse geometries. Comput. Phys. Commun. 235: 258-278 (2019) - 2018
- [j3]Tadeusz Tomczak
, Roman G. Szafran
:
Sparse Geometries Handling in Lattice Boltzmann Method Implementation for Graphic Processors. IEEE Trans. Parallel Distributed Syst. 29(8): 1865-1878 (2018) - 2011
- [j2]Tadeusz Tomczak
:
Hierarchical residue number systems with small moduli and simple converters. Int. J. Appl. Math. Comput. Sci. 21(1): 173-192 (2011) - 2008
- [j1]Tadeusz Tomczak
:
Fast Sign Detection for RNS (2n-1, 2n, 2n+1). IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(6): 1502-1511 (2008)
Conference and Workshop Papers
- 2006
- [c2]Marcin Gomulkiewicz, Maciej Nikodem, Tadeusz Tomczak
:
Low-cost and Universal Secure Scan: a Design- Architecture for Crypto Chips. DepCoS-RELCOMEX 2006: 282-288 - [c1]Tadeusz Tomczak
:
Residue Arithmetic in FPGA Matrices. DepCoS-RELCOMEX 2006: 297-305
Informal and Other Publications
- 2021
- [i4]Tadeusz Tomczak:
Data-Oriented Language Implementation of Lattice-Boltzmann Method for Dense and Sparse Geometries. CoRR abs/2108.13241 (2021) - 2017
- [i3]Tadeusz Tomczak, Roman G. Szafran:
Sparse geometries handling in lattice-Boltzmann method implementation for graphic processors. CoRR abs/1703.08015 (2017) - 2016
- [i2]Tadeusz Tomczak, Roman G. Szafran:
Memory layout in GPU implementation of lattice Boltzmann method for sparse 3D geometries. CoRR abs/1611.02445 (2016) - 2012
- [i1]Tadeusz Tomczak, Katarzyna Zadarnowska, Zbigniew Koza, Maciej Matyka, Lukasz Miroslaw:
Complete PISO and SIMPLE solvers on Graphics Processing Units. CoRR abs/1207.1571 (2012)
Coauthor Index
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