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ORCIDK. Paul Muller
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- affiliation: IBM Systems and Technology Group
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2010 – 2019
- 2015
[c7]Baozhen Li, K. Paul Muller, James D. Warnock, Leon J. Sigal, Dinesh Badami:
A case study of electromigration reliability: From design point to system operations. IRPS 2015: 2- [c6]Phil Oldiges, Kenneth P. Rodbell, Michael S. Gordon, John G. Massey, Kevin Stawiasz, Conal E. Murray, Henry H. K. Tang, K. Kim, K. Paul Muller:
SOI FinFET soft error upset susceptibility and analysis. IRPS 2015: 4 - [c5]Pong-Fei Lu, Keith A. Jenkins, K. Paul Muller, Ralf Schaufler:
Long-term data for BTI degradation in 32nm IBM microprocessor using HKMG technology. IRPS 2015: 6 - 2014
- [c4]Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam:
Soft Error Resiliency Characterization on IBM BlueGene/Q Processor. ASP-DAC 2014: 385-387 - [c3]Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam:
Soft error resiliency characterization and improvement on IBM BlueGene/Q processor using accelerated proton irradiation. ITC 2014: 1-6 - [c2]Chen-Yong Cher, Meeta Sharma Gupta, Pradip Bose, K. Paul Muller:
Understanding Soft Error Resiliency of Blue Gene/Q Compute Chip through Hardware Proton Irradiation and Software Fault Injection. SC 2014: 587-596 - 2010
- [c1]James D. Warnock, Leon J. Sigal, Dieter F. Wendel, K. Paul Muller, Joshua Friedrich, Victor V. Zyuban, Ethan H. Cannon, A. J. KleinOsowski:
POWER7TM local clocking and clocked storage elements. ISSCC 2010: 178-179
1990 – 1999
- 1999
- [j1]Michael Armacost, Peter D. Hoh, Richard Wise, Wendy Yan, Jeffrey J. Brown, John H. Keller, George A. Kaplita, Scott D. Halle, K. Paul Muller, Munir D. Naeem, Senthil Srinivasan, Hung Y. Ng, Martin Gutsche, Alois Gutmann, Bruno Spuler:
Plasma-etching processes for ULSI semiconductor circuits. IBM J. Res. Dev. 43(1): 39-72 (1999)
Coauthor Index
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