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Masahiro Kaminaga
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Journal Articles
- 2023
- [j12]Masahiro Kaminaga:
Upper Bound for the Coefficients of the Shortest Vector of Random Lattice. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106(12): 1585-1588 (2023) - 2022
- [j11]Masahiro Kaminaga:
Random Numbers Generated by the Oscillator Sampling Method as a Renewal Process. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 105-A(2): 118-121 (2022) - [j10]Masaharu Fukase, Masahiro Kaminaga:
Improving genetic algorithms for solving the SVP: focusing on low memory consumption and high reproducibility. Iran J. Comput. Sci. 5(4): 359-372 (2022) - 2020
- [j9]Toshinori Suzuki, Masahiro Kaminaga:
A True Random Number Generator Method Embedded in Wireless Communication Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(4): 686-694 (2020) - 2019
- [j8]Masahiro Kaminaga, Toshinori Suzuki
, Masaharu Fukase
:
Determining the Optimal Random-Padding Size for Rabin Cryptosystems. IEEE Trans. Inf. Forensics Secur. 14(8): 2232-2242 (2019) - 2018
- [j7]Masahiro Kaminaga, Hideki Yoshikawa, Arimitsu Shikoda
, Toshinori Suzuki:
Crashing Modulus Attack on Modular Squaring for Rabin Cryptosystem. IEEE Trans. Dependable Secur. Comput. 15(4): 723-728 (2018) - 2015
- [j6]Masahiro Kaminaga, Hideki Yoshikawa, Toshinori Suzuki:
Double Counting in 2t-ary RSA Precomputation Reveals the Secret Exponent. IEEE Trans. Inf. Forensics Secur. 10(7): 1394-1401 (2015) - 2014
- [j5]Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki:
Round Addition DFA on SPN Block Ciphers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(12): 2671-2674 (2014) - 2013
- [j4]Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda:
Round Addition Using Faults for Generalized Feistel Network. IEICE Trans. Inf. Syst. 96-D(1): 146-150 (2013) - [j3]Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki:
Round Addition DFA on 80-bit Piccolo and TWINE. IEICE Trans. Inf. Syst. 96-D(9): 2031-2035 (2013) - 2011
- [j2]Masahiro Kaminaga, Arimitsu Shikoda, Hideki Yoshikawa:
Development and evaluation of a microstep DFA vulnerability estimation method. IEICE Electron. Express 8(22): 1899-1904 (2011) - 2008
- [j1]Masahiro Kaminaga, Takashi Watanabe, Takashi Endo, Toshio Okochi:
Logic-Level Analysis of Fault Attacks and a Cost-Effective Countermeasure Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(7): 1816-1819 (2008)
Conference and Workshop Papers
- 2014
- [c2]Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki:
Secret key reconstruction method using round addition DFA on lightweight block cipher LBlock. ISITA 2014: 493-496 - 2013
- [c1]Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda, Toshinori Suzuki:
Round addition DFA for microcontroller implemented the triple DES. GCCE 2013: 538-539
Informal and Other Publications
- 2024
- [i3]Yu Morishima, Masahiro Kaminaga:
On SIS-problem-based random Feistel ciphers and its statistical evaluation of resistance against differential cryptanalysis. IACR Cryptol. ePrint Arch. 2024: 763 (2024) - 2016
- [i2]Masahiro Kaminaga, Hideki Yoshikawa, Arimitsu Shikoda, Toshinori Suzuki:
Crashing Modulus Attack on Modular Squaring for Rabin Cryptosystem. CoRR abs/1603.00100 (2016) - 2014
- [i1]Masahiro Kaminaga, Hideki Yoshikawa, Toshinori Suzuki:
Double Counting in $2^t$-ary RSA Precomputation Reveals the Secret Exponent. CoRR abs/1407.7598 (2014)
Coauthor Index
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