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Moty Mehalel

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Journal Articles

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2013
[j2]
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  dblp key:
  - journals/jssc/HuangMAH13
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  - https://dblp.org/rec/journals/jssc/HuangMAH13
Min Huang, Moty Mehalel, Ramesh Arvapalli, Songnian He:
An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family. IEEE J. Solid State Circuits 48(8): 1954-1962 (2013)
2012
[j1]
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  - journals/jssc/YuffeMKSKAFLZ12
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Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler, Eyal Fayneh, Kosta Luria, Michael Zelikson:
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor. IEEE J. Solid State Circuits 47(1): 194-205 (2012)

Conference and Workshop Papers

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2012
[c3]
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  - conf/cicc/HuangMAH12
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Min Huang, Moty Mehalel, Ramesh Arvapalli, Songnian He:
An energy efficient 32nm 20 MB L3 cache for Intel^® Xeon^® processor E5 family. CICC 2012: 1-4
2011
[c2]
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  - conf/isscc/YuffeKMSK11
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Marcelo Yuffe, Ernest Knoll, Moty Mehalel, Joseph Shor, Tsvika Kurts:
A fully integrated multi-CPU, GPU and memory controller 32nm processor. ISSCC 2011: 264-266
2007
[c1]
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  - conf/isscc/SakranYMDKK07
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Nabeel Sakran, Marcelo Yuffe, Moty Mehalel, Jack Doweck, Ernest Knoll, Avi Kovacs:
The Implementation of the 65nm Dual-Core 64b Merom Processor. ISSCC 2007: 106-590

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