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ORCIDGilberto Contreras
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2010 – 2019
- 2011
[j3]Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi:
Parallelization libraries: Characterizing and reducing overheads. ACM Trans. Archit. Code Optim. 8(1): 5:1-5:29 (2011)
2000 – 2009
- 2008
- [c6]Gilberto Contreras, Margaret Martonosi:
Characterizing and improving the performance of Intel Threading Building Blocks. IISWC 2008: 57-66 - [c5]Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi:
Full-system chip multiprocessor power evaluations using FPGA-based emulation. ISLPED 2008: 335-340 - 2007
- [j2]Gilberto Contreras, Margaret Martonosi, Jinzhang Peng, Guei-Yuan Lueh, Roy Ju:
The XTREM power and performance simulator for the Intel XScale core: Design and experiences. ACM Trans. Embed. Comput. Syst. 6(1): 4 (2007) - 2006
- [c4]Gilberto Contreras, Margaret Martonosi:
Techniques for Real-System Characterization of Java Virtual Machine Energy and Power Behavior. IISWC 2006: 29-38 - [c3]Canturk Isci, Gilberto Contreras, Margaret Martonosi:
Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management. MICRO 2006: 359-370 - 2005
- [j1]Julia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi:
Hardware-modulated parallelism in chip multiprocessors. SIGARCH Comput. Archit. News 33(4): 54-63 (2005) - [c2]Gilberto Contreras, Margaret Martonosi:
Power prediction for intel XScale processors using performance monitoring unit events. ISLPED 2005: 221-226 - 2004
- [c1]Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh:
XTREM: a power simulator for the Intel XScale® core. LCTES 2004: 115-125
Coauthor Index
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