A 28nm CMOS SAR-Based Continuous-Time Pipeline ADC with 103dB SFDR and 270MHz Bandwidth Using NCF and DAC Error Calibration.

Thu, 01 Jan 2026 00:00:00 +0100

Qilong Liu, Robert Rutten, Muhammed Bolatkale, Arda Aralioglu, Gilbert Hardeman, Emil Siby, Patrick van Mourik, Vinoth Ilamurugan, Shagun Bajoria, Lucien J. Breems:
A 28nm CMOS SAR-Based Continuous-Time Pipeline ADC with 103dB SFDR and 270MHz Bandwidth Using NCF and DAC Error Calibration. ISSCC 2026: 192-194