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2020 – today
- 2023
[j5]Shatadal Chatterjee
, Sounak Roy:
A low power offset voltage calibration method for flash ADCs. Integr. 88: 58-69 (2023)- 2022
- [j4]Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy:
A digitally controlled adaptive LDO for power management unit in sensor node. Integr. 87: 29-39 (2022) - [j3]Shatadal Chatterjee, Sounak Roy:
A Self-Calibration Method of a Pipeline ADC Based on Dynamic Capacitance Allotment. IEEE Trans. Very Large Scale Integr. Syst. 30(5): 666-670 (2022) - 2021
- [j2]Shatadal Chatterjee, Sounak Roy:
A Square Wave-Based Digital Foreground Calibration Algorithm of a Pipeline ADC Using Approximate Harmonic Sampling. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1068-1072 (2021) - [c8]Shatadal Chatterjee, Maryaradhiya Daimari, Sounak Roy:
A Fully Digital Foreground Calibration Technique of A Flash ADC. ISVLSI 2021: 1-6 - 2020
- [c7]Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy:
A Fast Transient Digitally Assisted Flash-Based Modular LDO for Sensor Nodes in WBAN. ISVLSI 2020: 363-367 - [c6]Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy:
An Adaptive Digitally Tuned Flash-based LDO with Reduced Hardware for Sensor Nodes in WBAN. VDAT 2020: 1-6
2010 – 2019
- 2019
- [c5]Sounak Roy, Shatadal Chatterjee:
A Low Power mixed Signal Foreground Calibration Technique of a Pipeline ADC using a Variable Gain Amplifier. TENCON 2019: 2168-2172 - [c4]M. Mahendra Reddy, Sounak Roy:
Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC. VDAT 2019: 141-149 - 2018
- [c3]Sounak Roy, Shatadal Chatterjee:
Sinusoid Based Foreground Calibration Algorithm of a Pipeline ADC Using Time Averaged Radix Extraction. TENCON 2018: 1332-1337 - 2013
- [j1]Sounak Roy, Hiranmoy Basak, Swapna Banerjee:
Foreground calibration technique of a pipeline ADC using capacitor ratio of Multiplying Digital-to-Analog Converter (MDAC). Microelectron. J. 44(12): 1336-1347 (2013) - 2012
- [c2]Sounak Roy, Bibhudatta Sahoo, Swapna Banerjee:
Radix based digital calibration technique for pipelined ADC using Nyquist sampling of sinusoid. ISCAS 2012: 2985-2988
2000 – 2009
- 2008
- [c1]Sounak Roy, Swapna Banerjee:
A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier. VLSI Design 2008: 323-329
Coauthor Index
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