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Nobu Matsumoto
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Journal Articles
- 2020
- [j4]Satoshi Kondo
, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono
, Tuan Thanh Ta
, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima
, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka
, Katsuyuki Kimura, Akihide Sai
, Nobu Matsumoto:
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm2 Voltage/Time Dual-Data-Converter-Based AFE. IEEE J. Solid State Circuits 55(11): 2866-2877 (2020) - 2018
- [j3]Kentaro Yoshioka
, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta
, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono
, Yoshinari Ojima
, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai
, Nobu Matsumoto:
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. IEEE J. Solid State Circuits 53(11): 3026-3038 (2018) - 2007
- [j2]Hiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Hiroki Tagawa, Yutaka Ota, Nobu Matsumoto:
Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2800-2809 (2007) - 2003
- [j1]Shunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Mitsuo Saito, Takashi Miyamori, Goichi Ootomo, Masataka Matsui:
A single-chip MPEG-2 codec based on customizable media embedded processor. IEEE J. Solid State Circuits 38(3): 530-540 (2003)
Conference and Workshop Papers
- 2020
- [c14]Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka
, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto:
5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm2 Voltage/Time Dual-Data-Converter-Based AFE. ISSCC 2020: 94-96 - [c13]Tuan Thanh Ta, Hiroshi Kubota, Koichi Kokubun, Toshiki Sugimoto, Masatoshi Hirono, Mitsuhiro Sengoku, Hisaaki Katagiri, Hidenori Okuni, Satoshi Kondo, Shinichi Ohtsuka, Honam Kwon, Keita Sasaki, Yutaka Ota, Kazuhiro Suzuki, Katsuyuki Kimura, Kentaro Yoshioka
, Akihide Sai, Nobu Matsumoto:
A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR. VLSI Circuits 2020: 1-2 - 2019
- [c12]Ken Tanabe, Hiroshi Kubota, Akihide Sai, Nobu Matsumoto:
Inter-Frame Smart-Accumulation Technique for Long-Range and High-Pixel Resolution LiDAR. COOL CHIPS 2019: 1-3 - 2018
- [c11]Ken Tanabe, Hiroshi Kubota, Akihide Sai, Nobu Matsumoto:
Data selection and de-noising based on reliability for long-range and high-pixel resolution LiDAR. COOL CHIPS 2018: 1-3 - [c10]Kentaro Yoshioka
, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiro Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto:
A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique. ISSCC 2018: 92-94 - 2013
- [c9]Takeshi Kodaka, Akira Takeda, Shunsuke Sasaki, Akira Yokosawa, Toshiki Kizu, Takahiro Tokuyoshi, Hui Xu, Toru Sano, Hiroyuki Usui, Jun Tanabe, Takashi Miyamori, Nobu Matsumoto:
A near-future prediction method for low power consumption on a many-core processor. DATE 2013: 1058-1059 - 2010
- [c8]Hiroaki Tanaka, Yutaka Ota, Nobu Matsumoto, Takuji Hieda, Yoshinori Takeuchi, Masaharu Imai:
A new compilation technique for SIMD code generation across basic block boundaries. ASP-DAC 2010: 101-106 - 2009
- [c7]Takeshi Kodaka, Shunsuke Sasaki, Takahiro Tokuyoshi, Ryuichiro Ohyama, Nobuhiro Nonogaki, Koji Kitayama, Tatsuya Mori, Yasuyuki Ueda, Hideho Arakida, Yuji Okuda, Toshiki Kizu, Yoshiro Tsuboi, Nobu Matsumoto:
Design and implementation of scalable, transparent threads for multi-core media processor. DATE 2009: 1035-1039 - 2006
- [c6]Hiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa:
Pack instruction generation for media pUsing multi-valued decision diagram. CODES+ISSS 2006: 154-159 - 2002
- [c5]Shunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Takashi Miyamori, Goichi Ootomo, Masataka Matsui:
A single-chip MPEG-2 codec based on customizable media microprocessor. CICC 2002: 163-166 - [c4]Atsushi Mizuno, Kazuyoshi Kohno, Ryuichiro Ohyama, Takahiro Tokuyoshi, Hironori Uetani, Hans Eichel, Takashi Miyamori, Nobu Matsumoto, Masataka Matsui:
Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture. ICCD 2002: 2-7 - 2001
- [c3]Kazuyoshi Kohno, Nobu Matsumoto:
A New Verification Methodology for Complex Pipeline Behavior. DAC 2001: 816-821 - 1993
- [c2]Joseph Dao, Nobu Matsumoto, Tsuneo Hamai, Chusei Ogawa, Shojiro Mori:
A Compaction Method for Full Chip VLSI Layouts. DAC 1993: 407-412 - 1990
- [c1]Nobu Matsumoto, Yoko Watanabe, Kimiyoshi Usami, Yukio Sugeno, Hiroshi Hatada, Shojiro Mori:
Datapath Generator Based on Gate-Level Symbolic Layout. DAC 1990: 388-393
Coauthor Index
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