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Jong Tae Kim
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2020 – today
- 2024
- [j18]Jong Kang Park
, Jong Tae Kim
:
Interleaved Binary Demodulation Technique for Low-Cost and Fast-Response Visible Light Positioning Using Palindromic Sequences. IEEE Internet Things J. 11(1): 653-665 (2024) - 2023
- [c24]Gyubin Seong, Jong Kang Park, Jong Tae Kim:
FPGA Implementation of Cycle-Reduced Diagonal Data Flow Systolic Array for Edge Device AI. ISOCC 2023: 99-100 - 2022
- [j17]Duckyong Kim
, Jong Kang Park
, Jong Tae Kim
:
Single LED, Single PD-Based Adaptive Bayesian Tracking Method. Sensors 22(17): 6488 (2022) - [j16]Jong Kang Park
, Duckyong Kim
, Jong Tae Kim:
Efficient Error-Resilient Bus Coding Method Using Bit-Basis Orthogonal Integrative Multiplexing. IEEE Trans. Emerg. Top. Comput. 10(2): 1178-1191 (2022) - [j15]Jong Kang Park
, Jong Tae Kim
:
Sliding-Windowed Compensated Multiplexing for Nonstatic Targets in Tactile Sensor Arrays. IEEE Trans. Ind. Electron. 69(4): 4254-4263 (2022) - 2020
- [j14]Duckyong Kim
, Jong Kang Park
, Jong Tae Kim
:
High-Efficient and Low-Cost Biased Multilevel Modulation Technique for IM/DD-Based VLP Systems. IEEE Access 8: 218954-218965 (2020)
2010 – 2019
- 2019
- [j13]Duckyong Kim
, Jong Kang Park
, Jong Tae Kim
:
Three-Dimensional VLC Positioning System Model and Method Considering Receiver Tilt. IEEE Access 7: 132205-132216 (2019) - [c23]Duckyong Kim, Jun Gil Ahn, Jong Kang Park, Jong Tae Kim:
A VLSI Design of Real-Time Sensor Fusion Unit using Kalman Filters. ICTC 2019: 1006-1009 - [c22]Tae Koan Yoo, Jong Kang Park, Jong Tae Kim:
VLSI Implementation of Area-Efficient Parallelized Neural Network Accelerator Using Hashing Trick. ISOCC 2019: 67-68 - 2018
- [j12]Jong Kang Park
, Jong Tae Kim
:
Delay-Tolerant Multiplexed Stimulation and Its Processing Method for Multi-Channel Active Sensors. IEEE Access 6: 46762-46770 (2018) - 2017
- [j11]Hyeonggeon Lee
, Jong Kang Park, Jong Tae Kim:
A unified system level error model of crosstalk and electromigration for on-chip interconnect. IEICE Electron. Express 14(5): 20161194 (2017) - [j10]Jong Kang Park
, Chang-Ju Lee, Jong Tae Kim
:
Analysis of Multi-Level Simultaneous Driving Technique for Capacitive Touch Sensors. Sensors 17(9): 2016 (2017) - [j9]JumHan Bae, Nam Tuan Le
, Jong Tae Kim
:
Smartphone Image Receiver Architecture for Optical Camera Communication. Wirel. Pers. Commun. 93(4): 1043-1066 (2017) - 2016
- [c21]Jong Kang Park, Jun Sung Go, Jong Tae Kim:
A pre-characterization method for multiple single-event transient analysis in cell-based designs. ISOCC 2016: 307-308 - 2015
- [j8]Jae Young Park, Jong Kang Park, Chang-Ju Lee, Jong Tae Kim:
Inverted driving technique for removing display noise in capacitive touch sensors. IEICE Electron. Express 12(19): 20150683 (2015) - [j7]Jong Kang Park
, Chang-Ju Lee, Do-Yeon Kim, Jung-Hoon Chun, Jong Tae Kim:
Application of weighing matrices to simultaneous driving technique for capacitive touch sensors. IEEE Trans. Consumer Electron. 61(2): 261-269 (2015) - [c20]Jong Kang Park, Chang-Ju Lee, Do-Yeon Kim, Jung-Hoon Chun, Jong Tae Kim:
Application of 4k-order Hadamard matrices to simultaneous driving capacitive touch systems. ICCE 2015: 564-565 - 2014
- [j6]Soongyu Kwon, Jong Kang Park, Jong Tae Kim:
An approximated soft error analysis technique for gate-level designs. IEICE Electron. Express 11(10): 20140224 (2014) - [j5]Soongyu Kwon, Jong Kang Park, Jong Tae Kim:
STAM: System level state-machine-based thermal behavior analysis for multicore processor. IEICE Electron. Express 11(19): 20140798 (2014) - 2011
- [j4]Hyun Ho Moon, Jong-Joo Lee, Sang-Yule Choi, Jae Sang Cha, Jang Mook Kang, Jong Tae Kim, Myong-Chul Shin:
A Study Using a Monte Carlo Method of the Optimal Configuration of a Distribution Network in Terms of Power Loss Sensing. Sensors 11(8): 7823-7834 (2011) - [c19]Dongjae Song, Soongyu Kwon, Chun-Guan Kim, Jong Tae Kim:
VLSI Architecture of Adaptive Viterbi Decoder for Wireless Communication. ISA 2011: 318-325 - 2010
- [c18]Soongyu Kwon, Dongjae Song, Seung Wook Lee, Jong Tae Kim:
System Level Power Analysis for SoC Architecture Exploration. PDPTA 2010: 257-262
2000 – 2009
- 2009
- [j3]Jong Kang Park, Jong Tae Kim, Myong-Chul Shin:
A CORDIC-based digital protective relay and its architecture. Microelectron. Reliab. 49(4): 438-447 (2009) - [c17]Hojun Kim, Jun Tae Kim, Jong Tae Kim:
Memory Error Analysis in Temporal TMR Viterbi Decoder. PDPTA 2009: 218-222 - [c16]Dong Seok Huh, Jae Young Park, Jong Tae Kim:
Hardware Accelerator Design for Crank Angle Sensor. PDPTA 2009: 797-802 - 2008
- [j2]Jong Kang Park, Jong Tae Kim:
A soft error mitigation technique for constrained gate-level designs. IEICE Electron. Express 5(18): 698-704 (2008) - [c15]Soongyu Kwon, Hojun Kim, Chaeseok Lim, Dae Jin Bae, Jong Tae Kim:
Power Prediction of Application Software for Embedded System Based on PXA270 Processor. ESA 2008: 39-42 - [c14]Hongmoon Wang, Hyun Suk Choi, Jong Tae Kim:
Workload-Based Dynamic Voltage Scaling with the QoS for Streaming Video. DELTA 2008: 236-239 - [c13]Minsu Kim, Haeseong Jeong, Chaeseok Lim, Jong Tae Kim:
Radiation Pattern Reconstruction for Localization using Artificial Neural Network. IC-AI 2008: 913-916 - [c12]Jong Kang Park, Hyun Suk Choi, Jong Tae Kim:
A soft error analysis tool for high-speed digital designs. ICUIMC 2008: 263-265 - 2007
- [c11]Chaeseok Lim, Jong Tae Kim:
Pipeline Scheduling with Dual Voltages for Low Power Design. CDES 2007: 100-104 - [c10]Seok Min Yoon, Seung Wook Lee, Hongmoon Wang, Jong Tae Kim:
Encoding-Based Tamper-Resistant Algorithm for Mobile Device Security. International Conference on Computational Science (4) 2007: 578-581 - 2006
- [c9]Chun-Guan Kim, Hongmoon Wang, Dae Jin Bae, Jong Tae Kim:
VLSI Design of Multiple Specifications Viterbi Decoder. ICWN 2006: 497-502 - [c8]Seung Wook Lee, Jong Tae Kim, Hongmoon Wang, Dae Jin Bae, Keon-Myung Lee
, Jee-Hyung Lee, Jae Wook Jeon:
Architecture of RETE Network Hardware Accelerator for Real-Time Context-Aware System. KES (1) 2006: 401-408 - [c7]Jong Kang Park, Yong Ki Byun, Jong Tae Kim:
Equivalent Electric Circuit Modeling of Differential Structures in PCB with Genetic Algorithm. KES (3) 2006: 907-913 - [c6]Seok Min Yoon, Jong Tae Kim:
Rule-Based Expert System for Designing DC-DC Converters. KES (3) 2006: 914-921 - 2005
- [c5]Seung Wook Lee, Jong Tae Kim, Bong Ki Sohn, Keon-Myung Lee, Jee-Hyung Lee, Jae Wook Jeon, Sukhan Lee:
Real-Time System-on-a-Chip Architecture for Rule-Based Context-Aware Computing. KES (1) 2005: 1014-1020 - [c4]Seung Wook Lee, Jong Tae Kim, Jae Sang Cha:
Implementation of Adaptive Reed-Solomon Decoder for Context-Aware Mobile Computing Device. KES (1) 2005: 1111-1117 - 2004
- [c3]Jong Kang Park, Jong Tae Kim, Myung Chul Shin:
High Performance Single Chip Implementation for a Digital Protective Relay Using FPGA. ESA/VLSI 2004: 504-508 - [c2]Keon-Myung Lee
, Bong Ki Sohn, Jong Tae Kim, Seung Wook Lee, Ji Hyong Lee, Jae Wook Jeon, Jundong Cho
:
An SoC-Based Context-Aware System Architecture. KES 2004: 573-580 - 2003
- [c1]Seung Wook Lee, Jong Tae Kim:
Universal Reed-Solomon Decoder Using Hardware/Software Co-Design Method. VLSI 2003: 279-284
1990 – 1999
- 1999
- [j1]Jong Tae Kim, Fadi J. Kurdahi
, Nohbyung Park:
System-level Time-stationary Control Synthesis for Pipelined Data Paths. VLSI Design 9(2): 159-180 (1999)
Coauthor Index
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