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Tim Fischer 0001
Person information
- affiliation: ETH Zurich, Integrated System Laboratory, Zürich, Switzerland
Other persons with the same name
- Tim Fischer — disambiguation page
- Tim Fischer 0002 — University of Hamburg, Department of Informatics, Hamburg, Germany
- Tim Fischer 0003 — University of Tübingen, Department of Computer Science, Tübingen, Germany
- Tim Fischer 0004 — RWTH Aachen University, Institute of Statistics, Aachen, Germany
- Tim Fischer 0005 — Balgrist University Hospital, Zurich, Switzerland
- Tim Fischer 0006 — University of Bern, ARTORG Center for Biomedical Engineering Research, Bern, Switzerland (and 1 more)
- Tim Fischer 0007 — Ramboll Energy, Hamburg, Germany
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2020 – today
- 2024
- [c8]Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus A. Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gürkaynak, Davide Rossi, Luca Benini:
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET. VLSI Technology and Circuits 2024: 1-2 - [i9]Viviane Potocnik, Luca Colagrande, Tim Fischer, Luca Bertaccini, Daniele Jahier Pagliari, Alessio Burrello, Luca Benini:
Optimizing Foundation Model Inference on a Many-tiny-core Open-source RISC-V Platform. CoRR abs/2405.19284 (2024) - [i8]Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus A. Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gürkaynak, Davide Rossi, Luca Benini:
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET. CoRR abs/2406.15068 (2024) - [i7]Alessandro Ottaviano, Robert Balas, Tim Fischer, Thomas Benz, Andrea Bartolini, Luca Benini:
ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5D Systems-in-package. CoRR abs/2410.15985 (2024) - 2023
- [j3]Tim Fischer, Michael Rogenmoser, Matheus A. Cavalcante, Frank K. Gürkaynak, Luca Benini:
FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic. IEEE Des. Test 40(6): 7-17 (2023) - [j2]Georg Rutishauser, Moritz Scherer, Tim Fischer, Luca Benini:
7 μJ/inference end-to-end gesture recognition from dynamic vision sensor data using ternarized hybrid convolutional neural networks. Future Gener. Comput. Syst. 149: 717-731 (2023) - [j1]Moritz Scherer, Alfio Di Mauro, Tim Fischer, Georg Rutishauser, Luca Benini:
TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology. IEEE Micro 43(1): 42-48 (2023) - [c7]Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
Sparse Hamming Graph: A Customizable Network-on-Chip Topology. DAC 2023: 1-6 - [c6]Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement. DAC 2023: 1-6 - [c5]Gamze Islamoglu, Moritz Scherer, Gianna Paulin, Tim Fischer, Victor J. B. Jung, Angelo Garofalo, Luca Benini:
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers. ISLPED 2023: 1-6 - [i6]Tim Fischer, Michael Rogenmoser, Matheus A. Cavalcante, Frank K. Gürkaynak, Luca Benini:
FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic. CoRR abs/2305.08562 (2023) - [i5]Gamze Islamoglu, Moritz Scherer, Gianna Paulin, Tim Fischer, Victor J. B. Jung, Angelo Garofalo, Luca Benini:
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers. CoRR abs/2307.03493 (2023) - 2022
- [c4]Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini:
MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V Cores. ARITH 2022: 1-8 - [c3]Moritz Scherer, Alfio Di Mauro, Georg Rutishauser, Tim Fischer, Luca Benini:
A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications. COOL CHIPS 2022: 1-3 - [c2]Georg Rutishauser, Moritz Scherer, Tim Fischer, Luca Benini:
Ternarized TCN for $\mu \mathrm{J}/\text{Inference}$ Gesture Recognition from DVS Event Frames. DATE 2022: 736-741 - [i4]Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini:
MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V cores. CoRR abs/2207.03192 (2022) - [i3]Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
Sparse Hamming Graph: A Customizable Network-on-Chip Topology. CoRR abs/2211.13980 (2022) - [i2]Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement. CoRR abs/2211.13989 (2022) - [i1]Moritz Scherer, Alfio Di Mauro, Tim Fischer, Georg Rutishauser, Luca Benini:
TCN-CUTIE: A 1036 TOp/s/W, 2.72 uJ/Inference, 12.2 mW All-Digital Ternary Accelerator in 22 nm FDX Technology. CoRR abs/2212.00688 (2022)
2010 – 2019
- 2019
- [c1]Tim Fischer, Michael Ganz, Nicolas Baumann, Michele Magno:
Piepser: A Smart Wrist-Worn Variometer To Maximize The Paragliders Flytime. SAS 2019: 1-6
Coauthor Index
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