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2020 – today
- 2024
[i2]Gerardo Bandera, Javier Salamero, Miquel Moretó, Julio Villalba:
Floating Point HUB Adder for RISC-V Sargantana Processor. CoRR abs/2401.09464 (2024)- [i1]Jaume Gauchola, Juan José Costa, Enric Morancho, Ramon Canal, Xavier Carril, Max Doblas, Beatriz Otero, Alex Pajuelo, Eva Rodríguez, Javier Salamero, Javier Verdú:
Hypervisor Extension for a RISC-V Processor. CoRR abs/2406.17796 (2024) - 2023
- [c1]Lluc Alvarez
, Abraham Ruiz, Arnau Bigas-Soldevilla, Pavel Kuroedov, Alberto González, Hamsika Mahale, Noe Bustamante, Albert Aguilera, Francesco Minervini, Javier Salamero, Oscar Palomar, Vassilis Papaefstathiou, Antonis Psathakis, Nikolaos Dimou, Michalis Giaourtas, Iasonas Mastorakis, Georgios Ieronymakis, Georgios-Michail Matzouranis, Vassilis Flouris, Nick Kossifidis, Manolis Marazakis, Bhavishya Goel, Madhavan Manivannan, Ahsen Ejaz, Panagiotis Strikos, Mateo Vázquez, Ioannis Sourdis, Pedro Trancoso, Per Stenström, Jens Hagemeyer, Lennart Tigges, Nils Kucza, Jean-Marc Philippe, Ioannis Papaefstathiou:
eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem. CF 2023: 309-314
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last updated on 2024-07-24 21:37 CEST by the dblp team
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