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2020 – today
- 2024
[j4]Han Liu
, Zhihan Zhang, Ye Liu, Daigao Chen, Donglai Lu, Jian He, Guike Li, Min Liu, Ziyue Dang, Xi Xiao, Nan Qi:
A 4×112 Gb/s PAM-4 Silicon-Photonic Transmitter and Receiver Chipsets for Linear-Drive Co-Packaged Optics. IEEE J. Solid State Circuits 59(10): 3263-3276 (2024)- [c15]Sikai Chen, Jintao Xue, Yihan Chen, Yuean Gu, Haoran Yin, Shenlei Bao, Guike Li, Binhao Wang, Nan Qi:
A 2λ×100 Gb/s Optical Receiver with Si-Photonic Micro-Ring Resonator and Photo-Detector for DWDM Optical-IO. CICC 2024: 1-2 - [c14]Xinyu Shen, Zhao Zhang, Yong Chen, Yixi Li, Yidan Zhang, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 0.144 mm212.5-16GHz PVT-Tolerant Dual-Path Offset-Charge-Pump-Based Fractional-N PLL Achieving 72.9 fSRMs Jitter, -271.5dB FoMN, and Sub-10% Jitter Variation. CICC 2024: 1-2 - [c13]Yang Min, Yi Zhang, Tao Yang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Yonghui Lin, Huiyao Peng, Jingbo Shi, Nan Qi:
A 32Gb/s NRZ Low-Bias DFB Driver with Frequency Boosting for High Efficiency Data Transmission. ISCAS 2024: 1-4 - 2023
- [j3]Sikai Chen, Mingyang You, Yunqi Yang, Ye Jin, Ziyi Lin, Yihong Li, Leliang Li, Guike Li, Yujun Xie, Zhao Zhang, Binhao Wang, Ningfeng Tang, Faju Liu, Zheyu Fang, Jian Liu, Nanjian Wu, Yong Chen, Liyuan Liu, Ninghua Zhu, Ming Li, Nan Qi:
A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4271-4282 (2023) - [c12]Han Liu, Nan Qi, Donglai Lu, Zizheng Dong, Zhihan Zhang, Jian He, Guike Li, Leliang Li, Ye Liu, Ziyue Dang, Daigao Chen, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Liyuan Liu:
A $\boldsymbol{4} \times \boldsymbol{112}-\mathbf{Gb}/\mathbf{s}$ PAM-4 Silicon-Photonic Transceiver Front-End for Linear-Drive Co-Packaged Optics. A-SSCC 2023: 1-3 - [c11]Zhaoyu Zhang, Zhao Zhang, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu:
A 0.0035-mm2 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE. ESSCIRC 2023: 177-180 - [c10]Xinyu Shen, Zhao Zhang, Guike Li, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM. ESSCIRC 2023: 257-260 - [c9]Yongliang Xiong, Yihao Yang, Qianli Ma, Yangming Ren, Leliang Li, Guike Li, Jian Liu, Yingtao Li, Binhao Wang, Nan Qi, Liyuan Liu:
A 400-Gb/s 64-QAM Optical Receiver with Monolithically Integrated TIA and Balanced-PD in 45-nm SOI CMOS. ICTA 2023: 186-187 - [c8]Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Guike Li, Nan Qi, Jian Liu, Yong Chen, Nanjian Wu, Liyuan Liu:
A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, -253.8dB Jitter-Power FoM, and -76.1dBc Reference Spur. ISSCC 2023: 86-87 - 2022
- [j2]Qiwen Liao, Yuguang Zhang, Siyuan Ma, Lei Wang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi:
A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR. IEEE J. Solid State Circuits 57(3): 767-780 (2022) - [j1]Jian He, Donglai Lu, Haiyun Xue, Sikai Chen, Han Liu, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Nanjian Wu, Ningmei Yu, Fengman Liu, Xi Xiao, Yong Chen, Nan Qi:
Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4345-4357 (2022) - [c7]Yihong Li, Sikai Chen, Yunqi Yang, Qianli Ma, Ming Zhong, Ziyi Lin, Leliang Li, Guike Li, Zhao Zhang, Liyuan Liu, Jian Liu, Nanjian Wu, Yong Chen, Qi Peng, Nan Qi:
A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS. APCCAS 2022: 360-363 - [c6]Zhaoyu Zhang, Xinyu Shen, Yixi Li, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang:
A 0.006-mm26-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop. APCCAS 2022: 556-559 - [c5]Yixi Li, Xinyu Shen, Zhaoyu Zhang, Guike Li, Tao Yin, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang:
A 0.004-mm2 O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL. APCCAS 2022: 569-573 - [c4]Yunqi Yang, Ming Zhong, Qianli Ma, Ziyi Lin, Leliang Li, Guike Li, Liyuan Liu, Jian Liu, Nanjian Wu, Haikun Jia, Xinghui Liu, Nan Qi:
A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O. ICTA 2022: 1-2 - [c3]Sikai Chen, Jintao Xue, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Binhao Wang, Yingtao Li, Nan Qi:
A 224-Gb/s Inverter-Based TIA with Interleaved Active-Feedback and Distributed Peaking in 28-nm CMOS for Silicon Photonic Receivers. ICTA 2022: 198-199 - 2021
- [c2]Mingyang You, Minjia Chen, Yihong Li, Guike Li, Jian Liu, Yong Chen, Yingtao Li, Nan Qi:
A 4×25Gb/s De-Serializer with Baud-Rate Sampling CDR and Standing-Wave Clock Distribution for NIC Optical Interconnects. ICTA 2021: 253-254 - [c1]Han Liu, Guike Li, Jian Liu, Nanjian Wu, Liyuan Liu, Yingtao Li, Nan Qi:
A Fast-Transient Capacitor-Less Low-Dropout Regulator for Wideband Optical Transceivers. ICTA 2021: 257-258
Coauthor Index
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