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2010 – 2019
- 2010
[j2]Ahmed M. A. Ali
, Andrew S. Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Paritosh Bhoraskar, Hüseyin Dinc, Mike Hensley, Russell Stop, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed:
A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration. IEEE J. Solid State Circuits 45(12): 2602-2612 (2010)- [c2]Ahmed M. A. Ali, Andy Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Mike Hensley, Russell Stop, Paritosh Bhoraskar, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed:
A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration. ISSCC 2010: 292-293
2000 – 2009
- 2006
- [j1]Ahmed M. A. Ali, Christopher Dillon, Robert Sneed, Andrew S. Morgan, Scott Bardsley, John Kornblum, Lu Wu:
A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter. IEEE J. Solid State Circuits 41(8): 1846-1855 (2006) - 2005
- [c1]Ahmed M. A. Ali, Christopher Dillon, Robert Sneed, Andrew S. Morgan, John Kornblum, Lu Wu, Scott Bardsley:
A 14-bit 125 MS/s IF/RF sampling pipelined A/D converter. CICC 2005: 391-394
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