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Hidenari Nakashima
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2010 – 2019
- 2010
- [j8]Toshiki Kanamoto
, Takaaki Okumura, Katsuhiro Furukawa, Hiroshi Takafuji, Atsushi Kurokawa, Koutaro Hachiya
, Tsuyoshi Sakata, Masakazu Tanaka, Hidenari Nakashima, Hiroo Masuda, Takashi Sato
, Masanori Hashimoto
:
Impact of Self-Heating in Wire Interconnection on Timing. IEICE Trans. Electron. 93-C(3): 388-392 (2010)
2000 – 2009
- 2009
- [j7]Takaaki Okumura, Atsushi Kurokawa, Hiroo Masuda, Toshiki Kanamoto
, Masanori Hashimoto
, Hiroshi Takafuji, Hidenari Nakashima, Nobuto Ono, Tsuyoshi Sakata, Takashi Sato
:
Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 990-997 (2009) - [j6]Tsuyoshi Sakata, Takaaki Okumura, Atsushi Kurokawa, Hidenari Nakashima, Hiroo Masuda, Takashi Sato
, Masanori Hashimoto
, Koutaro Hachiya
, Katsuhiro Furukawa, Masakazu Tanaka, Hiroshi Takafuji, Toshiki Kanamoto
:
An Approach for Reducing Leakage Current Variation due to Manufacturing Variability. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3016-3023 (2009) - 2007
- [j5]Koutaro Hachiya
, Takayuki Ohshima, Hidenari Nakashima, Masaaki Soda, Satoshi Goto:
Fast Methods to Estimate Clock Jitter due to Power Supply Noise. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 741-747 (2007) - [j4]Hiroyuki Kobayashi, Nobuto Ono, Takashi Sato
, Jiro Iwai, Hidenari Nakashima, Takaaki Okumura, Masanori Hashimoto
:
Proposal of Metrics for SSTA Accuracy Evaluation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 808-814 (2007) - 2005
- [j3]Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu
:
Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3358-3366 (2005) - [j2]Hidenari Nakashima, Naohiro Takagi, Junpei Inoue, Kenichi Okada, Kazuya Masu
:
Evaluation of X Architecture Using Interconnect Length Distribution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3437-3444 (2005) - [j1]Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu
:
Wire Length Distribution Model for System LSI. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3445-3452 (2005) - [c2]Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu
:
Wire Length Distribution Model Considering Core Utilization for System on Chip. ISVLSI 2005: 276-277 - 2004
- [c1]Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu
:
ULSI Interconnect Length Distribution Model Considering Core Utilization. DATE 2004: 1210-1217
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