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ORCIDKyung Tek Lee
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- affiliation: IBM Austin Research Laboratory, Austin, TX, USA
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Journal Articles
- 2006
[j2]Jason M. Hart, Kyung T. Lee, Dennis Chen, Lik Cheng, Chipai Chou, Anand Dixit, Dale Greenley, Gregory Gruber, Kenneth Ho, Jesse Hsu, Naveen G. Malur, John Wu:
Implementation of a fourth-generation 1.8-GHz dual-core SPARC V9 microprocessor. IEEE J. Solid State Circuits 41(1): 210-217 (2006)- 1998
- [j1]Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka
, Stephen D. Posluszny, Osamu Takahashi, Ivan Vo, Brian A. Zoric:
A 1.0-GHz single-issue 64-bit powerPC integer processor. IEEE J. Solid State Circuits 33(11): 1600-1608 (1998)
Conference and Workshop Papers
- 2000
- [c5]Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia:
"Timing closure by design, " a high frequency microprocessor design methodology. DAC 2000: 712-717 - 1999
- [c4]Kyung Tek Lee, Jacob A. Abraham:
Critical path identification and delay tests of dynamic circuits. ITC 1999: 421-430 - 1998
- [c3]Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Joel Silberman, Osamu Takahashi, Ivan Vo:
Design methodology for a 1.0 GHz microprocessor. ICCD 1998: 17-23 - [c2]Kyung Tek Lee, Clay Nordquist, Jacob A. Abraham:
Automatic Test Pattern Generation for Crosstalk Glitches in Digital Circuits. VTS 1998: 34-41 - 1997
- [c1]Rathish Jayabharathi, Kyung Tek Lee, Jacob A. Abraham:
A Novel Solution for Chip-Level Functional Timing Verification. VTS 1997: 137-142
Coauthor Index
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