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2020 – today
- 2024
[j12]Stefano Bertazzoni
, Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
Design Space Exploration for Edge Machine Learning Featured by MathWorks FPGA DL Processor: A Survey. IEEE Access 12: 9418-9439 (2024)- [j11]Lorenzo Canese, Gian Carlo Cardarilli, Riccardo La Cesa, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Sergio Spanò:
A Novel Digital Equalizer Based on RF Sampling Beyond GHz. IEEE Access 12: 92560-92572 (2024) - 2023
- [j10]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Alberto Nannarelli, Sergio Spanò:
An RNS-Based Initial Absolute Position Estimator for Electrical Encoders. IEEE Access 11: 98586-98595 (2023) - [j9]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Sergio Spanò:
Efficient Digital Implementation of a Multirate-Based Variable Fractional Delay Filter for Wideband Beamforming. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 2231-2235 (2023) - [c16]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
A Hardware-Oriented QAM Demodulation Method Driven by AW-SOM Machine Learning. ACSSC 2023: 937-941 - [c15]Damiano Angeloni, Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, Sergio Spanò:
A RISC-V Hardware Accelerator for Q-Learning Algorithm. ApplePies 2023: 74-79 - 2022
- [j8]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Re, Andrea Ricci, Sergio Spanò:
An FPGA-based multi-agent Reinforcement Learning timing synchronizer. Comput. Electr. Eng. 99: 107749 (2022) - [j7]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Hamed Famil Ghadakchi, Marco Re, Sergio Spanò:
Sensing and Detection of Traffic Signs Using CNNs: An Assessment on Their Performance. Sensors 22(22): 8830 (2022) - [c14]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
Automatic IP Core Generator for FPGA-Based Q-Learning Hardware Accelerators. ApplePies 2022: 242-247 - [c13]Sergio Spanò, Lorenzo Canese, Gian Carlo Cardarilli:
Profiling of CNNs using the MATLAB FPGA-based Deep Learning Processor. PRIME 2022: 121-124 - [c12]Lorenzo Canese, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
FPGA-Based Road Crack Detection Using Deep Learning. SYSINT 2022: 65-73 - 2021
- [j6]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Massimo Panella, Marco Re, Antonello Rosato, Sergio Spanò:
A Parallel Hardware Implementation for 2-D Hierarchical Clustering Based on Fuzzy Logic. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1428-1432 (2021) - [j5]Daniele Giardino, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re, Sergio Spanò:
M-PSK Demodulator With Joint Carrier and Timing Recovery. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1912-1916 (2021) - [c11]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Dario Natale, Marco Re, Sergio Spanò:
"MR Q-Learning" Algorithm for Efficient Hardware Implementations. ACSCC 2021: 1186-1190 - [c10]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Matteo Guadagno, Marco Re, Sergio Spanò:
A M-PSK Timing Recovery Loop Based on Q-Learning. ApplePies 2021: 39-44 - 2020
- [j4]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re, Sergio Spanò:
AW-SOM, an Algorithm for High-Speed Learning in Hardware Self-Organizing Maps. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 380-384 (2020) - [j3]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, Marco Re, Sergio Spanò:
N-Dimensional Approximation of Euclidean Distance. IEEE Trans. Circuits Syst. II Express Briefs 67-II(3): 565-569 (2020) - [c9]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Alberto Nannarelli, Marco Re, Sergio Spanò:
FPGA Implementation of Q-RTS for Real-Time Swarm Intelligence Systems. ACSSC 2020: 116-120 - [c8]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Sergio Spanò:
An Action-Selection Policy Generator for Reinforcement Learning Hardware Accelerators. ApplePies 2020: 267-272
2010 – 2019
- 2019
- [j2]Marco Matta, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Alberto Nannarelli, Marco Re, Sergio Spanò:
A Reinforcement Learning-Based QAM/PSK Symbol Synchronizer. IEEE Access 7: 124147-124157 (2019) - [j1]Sergio Spanò, Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Alberto Nannarelli, Marco Re:
An Efficient Hardware Implementation of Reinforcement Learning: The Q-Learning Algorithm. IEEE Access 7: 186340-186351 (2019) - [c7]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Sergio Spanò:
Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning. ApplePies 2019: 325-331 - 2018
- [c6]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Daniele Giardino, Marco Matta, Marco Re, Francesca Silvestri, Sergio Spanò:
Efficient Ensemble Machine Learning Implementation on FPGA Using Partial Reconfiguration. ApplePies 2018: 253-259 - [c5]Gian Carlo Cardarilli, Daniele Giardino, Marco Matta, Marco Re, Francesca Silvestri, Lorenzo Simone, Sergio Spanò:
Comparison and Implementation of Variable Fractional Delay Filters for Wideband Digital Beamforming. ApplePies 2018: 445-451 - [c4]Daniele Giardino, Marco Matta, Marco Re, Francesca Silvestri, Sergio Spanò:
IP Generator Tool for Efficient Hardware Acceleration of Self-organizing Maps. ApplePies 2018: 493-499 - [c3]Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Dario Gelfusa, Marco Matta, Alberto Nannarelli, Marco Re, Lorenzo Simone, Sergio Spanò:
Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker. SMACD 2018: 1-20 - 2017
- [c2]Simone Acciarito, Gian Carlo Cardarilli, Gaurav Mani Khanal, Marco Matta, Marco Re, Francesca Silvestri, Sergio Spanò, Dario Gelfusa, Lorenzo Simone:
Digital Architecture of Next Generation Spacecraft Tracker Based on Wideband ∆DOR. ApplePies 2017: 17-24 - [c1]Simone Acciarito, Daniele Giardino, Gaurav Mani Khanal, Marco Re, Francesca Silvestri, Sergio Spanò:
FPGA Implementation of a Channelizer with 2048 Channels Utilizing USRP-SDR Platform for Satellite Communications. ApplePies 2017: 25-31
Coauthor Index
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last updated on 2024-07-20 21:17 CEST by the dblp team
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