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2020 – today
- 2020
[j26]Tarak K. Kodali, Yilin Zhang, Eugene John, Wei-Ming Lin:
An Asynchronous High-Performance Approximate Adder with Low-Cost Error Correction. J. Inf. Sci. Eng. 36(1): 1-12 (2020)- [c37]Taposh Banerjee, Edmond Adib, Ahmad F. Taha, Eugene John:
Sequential Methods for Detecting a Change in the Distribution of an Episodic Process. ICASSP 2020: 6009-6013 - [c36]Snehil Verma, Qinzhe Wu, Bagus Hanindhito, Gunjan Jha, Eugene B. John, Ramesh Radhakrishnan, Lizy K. John:
Demystifying the MLPerf Training Benchmark Suite. ISPASS 2020: 24-33
2010 – 2019
- 2019
- [j25]Todd A. Newton
, Eugene B. John:
A metric for measuring power efficiency and data throughput in mobile ad hoc networks. Int. J. Parallel Emergent Distributed Syst. 34(5): 556-571 (2019) - [j24]Abdullah A. Owahid, Eugene B. John:
Wasted dynamic power and correlation to instruction set architecture for CPU throttling. J. Supercomput. 75(5): 2436-2454 (2019) - [j23]Safwat Mostafa Noor, Eugene B. John:
Resource Shared Galois Field Computation for Energy Efficient AES/CRC in IoT Applications. IEEE Trans. Sustain. Comput. 4(4): 340-348 (2019) - [j22]Safwat Mostafa Noor, Eugene John, Manoj Panday:
Design and Implementation of an Ultralow-Energy FFT ASIC for Processing ECG in Cardiac Pacemakers. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 983-987 (2019) - [c35]Cory Davis, Alekhya Muthineni, Eugene John:
Low-Power Advanced Encryption Standard for Implantable Cardiac Devices. MWSCAS 2019: 41-44 - [c34]Abdullah A. Owahid, Eugene B. John:
Instruction Profiling Based Fetch Throttling for Wasted Dynamic Power Reduction. SBAC-PAD 2019: 29-32 - [c33]Joseph Whitehouse, Qinzhe Wu, Shuang Song, Eugene John, Andreas Gerstlauer, Lizy K. John:
A Study of Core Utilization and Residency in Heterogeneous Smart Phone Architectures. ICPE 2019: 67-78 - [i1]Snehil Verma, Qinzhe Wu, Bagus Hanindhito, Gunjan Jha, Eugene B. John, Ramesh Radhakrishnan, Lizy K. John:
Demystifying the MLPerf Benchmark Suite. CoRR abs/1908.09207 (2019) - 2018
- [j21]Santosh Koppa, Eugene John:
Performance Tradeoffs in the Design of Low-Power SRAM Arrays for Implantable Devices. J. Low Power Electron. 14(1): 18-27 (2018) - [c32]Gunjan Jha, Eugene John:
Performance Analysis of Single-Precision Floating-Point MAC for Deep Learning. MWSCAS 2018: 885-888 - [c31]Juan Portillo, Eugene John:
Using Static Hardware Wrappers to Thwart Hardware Trojans and Code Bugs at Runtime. MWSCAS 2018: 1034-1037 - 2017
- [j20]Hao Yan, Lei Jiang, Lide Duan, Wei-Ming Lin, Eugene John:
FlowPaP and FlowReR: Improving Energy Efficiency and Performance for STT-MRAM-Based Handheld Devices under Read Disturbance. ACM Trans. Embed. Comput. Syst. 16(5s): 132:1-132:20 (2017) - 2016
- [j19]Safwat Mostafa, Eugene John:
Reducing Power and Cycle Requirement for Fast Fourier Transform of Electrocardiogram Signals Through Low Level Arithmetic Optimizations for Cardiac Implantable Devices. J. Low Power Electron. 12(1): 21-29 (2016) - [j18]Santosh Koppa, Manouchehr Mohandesi, Eugene John:
An Ultra-Low Power Charge Redistribution Successive Approximation Register A/D Converter for Biomedical Applications. J. Low Power Electron. 12(4): 385-393 (2016) - [c30]Santosh Koppa, Paromita Syam, Sruthi Nanduru, Eugene John:
A quantitative performance analysis of FinFET based multiplier circuits. MWSCAS 2016: 1-4 - [c29]Juan Portillo, Eugene John, Seetharam Narasimhan:
Building trust in 3PIP using asset-based security property verification. VTS 2016: 1-6 - 2015
- [j17]Jiwan Ninglekhu, Ram Krishnan, Eugene John, Manoj Panday:
Securing Implantable Cardioverter Defibrillators Using Smartphones. J. Internet Serv. Inf. Secur. 5(2): 47-64 (2015) - [j16]Savithra Eratne, Pradeep S. Nair, Eugene John:
A Thermal-Aware Scheduling Algorithm for Core Migration in Multicore Processors. J. Low Power Electron. 11(2): 103-111 (2015) - [j15]Carlos Vazquez, Ram Krishnan, Eugene John:
Time Series Forecasting of Cloud Data Center Workloads for Dynamic Resource Provisioning. J. Wirel. Mob. Networks Ubiquitous Comput. Dependable Appl. 6(3): 87-110 (2015) - [c28]Kathlene Hurt, Eugene John:
Analysis of Memory Sensitive SPEC CPU2006 Integer Benchmarks for Big Data Benchmarking. PABS@ICPE 2015: 11-16 - 2014
- [c27]Nilufar Ferdous, Byeong Kil Lee, Eugene John:
Performance enhancement in shared-memory multiprocessors using dynamically classified sharing information. IPCCC 2014: 1-8 - [c26]Joseph Whitehouse, Eugene John:
Leakage and delay analysis in FinFET array multiplier circuits. MWSCAS 2014: 909-912 - [c25]Kester Leochico, Eugene John:
Data retention voltage analysis of various low-power SRAM topologies. MWSCAS 2014: 913-916 - [c24]Yilin Zhang, Marcus Hays, Wei-Ming Lin, Eugene John:
Autonomous control of issue queue utilization for simultaneous multi-threading processors. SpringSim (HPS) 2014: 19 - 2013
- [c23]Prajna Mishra, Eugene John, Wei-Ming Lin:
Static noise margin and power dissipation analysis of various SRAM topologies. MWSCAS 2013: 469-472 - 2012
- [j14]Monobrata Debnath, Wei-Ming Lin, Eugene John:
Adaptive instruction dispatching techniques for Simultaneous Multi-Threading (SMT) processors. Comput. Electr. Eng. 38(6): 1616-1626 (2012) - [j13]Pradeep S. Nair, Savithra Eratne, Eugene B. John:
Probability-Based Optimal Sizing of Power-Gating Transistors in Full Adders for Reduced Leakage and High Performance. J. Low Power Electron. 8(4): 464-471 (2012) - [c22]Jie Luo, Kathlene Morales, Byeong Kil Lee, Eugene John, Young Kyu Choi:
Performance-sensitivity and performance-similarity based workload reduction. IPCCC 2012: 21-30 - [c21]Savithra Eratne, Eugene John, Byeong Kil Lee:
Reducing thermal hotspots in microprocessors with expanded component sizing. MWSCAS 2012: 635-638 - 2011
- [j12]Pradeep S. Nair, Dhireesha Kudithipudi, Eugene B. John, Fred W. Hudson:
Execution characteristics of embedded applications on a Pentium 4-based personal computer. J. Embed. Comput. 4(3-4): 107-116 (2011) - 2010
- [j11]Binu P. John, Abhishek Agrawal, Bob Steigerwald, Eugene B. John:
Impact of Operating System Behavior on Battery Life. J. Low Power Electron. 6(1): 10-17 (2010) - [c20]Savithra Eratne, Claudia Romo, Eugene John:
Leakage Power Analysis of Multi-bit Adders Using Transistor Gate Length Increase. CDES 2010: 61-66 - [c19]Savithra Eratne, Claudia Romo, Eugene John, Byeong Kil Lee:
Leakage and Access Time Tradeoffs for Cache in High Performance Microprocessors. CDES 2010: 105-108 - [c18]Byeong Kil Lee, Satish Raghunath, Eugene John:
Architectural Sensitivity Analysis on Network Workloads. CDES 2010: 140-145
2000 – 2009
- 2009
- [j10]Christopher Martinez, Mythri Pinnamaneni, Eugene B. John:
Performance of commercial multimedia workloads on the Intel Pentium 4: A case study. Comput. Electr. Eng. 35(1): 18-32 (2009) - [j9]Dhireesha Kudithipudi, Eugene John:
Implications of gated-Vss technique on leakage power in embedded caches. Int. J. Embed. Syst. 4(1): 17-26 (2009) - [c17]Binu P. John, Pradeep S. Nair, Eugene John, Fred W. Hudson:
Performance Measurement of Single, Dual and Quad Core Machines Using SPEC CPU2006. CDES 2009: 143-149 - [c16]Pradeep S. Nair, Santosh Koppa, Eugene B. John, Dhireesha Kudithipudi:
Topology selection of FPGA look-up tables for low-leakage operation. ECCTD 2009: 73-76 - [c15]Ciji Isen, Lizy K. John, Eugene John:
A Tale of Two Processors: Revisiting the RISC-CISC Debate. SPEC Benchmark Workshop 2009: 57-76 - 2008
- [j8]Christopher B. Smith, David R. Mandel, Eugene John:
A superscalar simulation employing poisson distributed stalls. Comput. Electr. Eng. 34(3): 192-201 (2008) - [j7]Dhireesha Kudithipudi, Stefan Petko, Eugene B. John:
Caches for Multimedia Workloads: Power and Energy Tradeoffs. IEEE Trans. Multim. 10(6): 1013-1021 (2008) - [c14]Savithra Eratne, Sebastian Puthenpurayil, Eugene John:
Energy efficient lossless image compression with prediction-based transform. APCCAS 2008: 344-347 - [c13]Pradeep S. Nair, Savithra Eratne, Eugene John:
Topology-related effects of Gated-Vdd and Gated-Vss techniques on full-adder leakage and delay at 65nm and 45 nm. APCCAS 2008: 972-975 - [c12]Pradeep S. Nair, Savithra Eratne, Eugene John:
Effects of Register File Organization on Leakage Power Consumption. CDES 2008: 85-88 - [c11]Savithra Eratne, Sebastian Puthenpurayil, Eugene John:
Energy Efficiency of Data Compression with Wavelets. IPCV 2008: 75-78 - 2007
- [j6]Pradeep S. Nair, Eugene B. John:
Analysing the performance of personal computers based on Intel microprocessors for sequence aligning bioinformatics applications. Int. J. Bioinform. Res. Appl. 3(2): 187-205 (2007) - [j5]Dhireesha Kudithipudi, Eugene John:
Static Power Analysis and Estimation in Ternary Content Addressable Memory Cells. J. Low Power Electron. 3(3): 293-301 (2007) - [c10]Pradeep S. Nair, Eugene John:
Performance Analysis of an Intel Pentium-4 Based Personal Computer for Multiplke Sequence Alignment. CDES 2007: 74-77 - 2006
- [j4]Byeong Kil Lee, Lizy Kurian John, Eugene John:
Architectural enhancements for network congestion control applications. IEEE Trans. Very Large Scale Integr. Syst. 14(6): 609-615 (2006) - [c9]Pradeep S. Nair, Eugene John:
Performance of Sequence Alignment Bioinformatics Applications on General Purpose Processors: A Case Study. BIOCOMP 2006: 556-559 - [c8]Pradeep S. Nair, Dhireesha Kudithipudi, Eugene John, Fred W. Hudson:
Performance Analysis of Embedded Applications on a Pentium-4 Based Machine. ESA 2006: 191-197 - 2005
- [j3]Dhireesha Kudithipudi, Eugene John:
Implementation of Low Power Digital Multipliers using 10 -Transistor Adder Blocks. J. Low Power Electron. 1(3): 286-296 (2005) - [c7]Byeong Kil Lee, Lizy Kurian John, Eugene John:
Architectural Support for Accelerating Congestion Control Applications in Network Processors. ASAP 2005: 169-178 - [c6]Dhireesha Kudithipudi, Eugene John:
Parametrical characterization of leakage power in embedded system caches using gated-VSS. Circuits, Signals, and Systems 2005: 308-312 - 2004
- [c5]Dhireesha Kudithipudi, R. Kotha, Eugene John, Z. Pantic-Tanner:
Impact of nanotechnology on the performance of CMOS digital multipliers. Circuits, Signals, and Systems 2004: 439-442 - 2002
- [c4]Stefan Petko, Dhireesha Kudithipudi, Eugene John:
Cache performance of video computation workloads. DCV 2002: 169-175
1990 – 1999
- 1999
- [j2]A. Moreno, Eugene B. John:
A flexible design for timing signals generation for the conversion of computer video formats to SDTV 480P. IEEE Trans. Consumer Electron. 45(4): 1081-1086 (1999) - [c3]R. Shalem, Lizy Kurian John, Eugene John:
A Novel Low Power Energy Recovery Full Adder Cell. Great Lakes Symposium on VLSI 1999: 380- - 1998
- [c2]Eugene John, Fred W. Hudson, Lizy K. John:
Hybrid Tree: A Scalable Optoelectronic Interconnection Network for Parallel Computing. HICSS (7) 1998: 466-474 - 1995
- [c1]Lizyamma Kurian, Daniel Brewer, Eugene John:
Design of a highly reconfigurable interconnect for array processors. VLSI Design 1995: 321-325 - 1992
- [j1]Paul T. Hulina, Lizyamma Kurian, Eugene B. John, Lee D. Coraor:
Design and VLSI implementation of an access processor for a decoupled architecture. Microprocess. Microsystems 16(5): 237-247 (1992)
Coauthor Index
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