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Yong-geol Kim

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2010 – 2019

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2018
[c2]
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Min-Su Kim, Ah-Reum Kim, Yong-geol Kim, Chunghee Kim, Dong-Yeop Kim, Jong-Woo Kim, Daeseong Lee, Hyun Lee, Jungyul Pyo, Youngmin Shin, Jae Cheol Son:
Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling. ISCAS 2018: 1-5
2016
[c1]
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Min-Su Kim, Chunghee Kim, Yong-geol Kim, Ah-Reum Kim, Jikyum Kim, Juhyun Kang, Daeseong Lee, Changjun Choi, Ilsuk Suh, Jungyul Pyo, Youngmin Shin, Jae Cheol Son:
Single-ended D flip-flop with implicit scan mux for high performance mobile AP. SoCC 2016: 91-95

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