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ORCIDLukás Kohútka
Person information
- affiliation: Slovak University of Technology in Bratislava, Slovakia
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2020 – today
- 2023
[c17]Ján Mach
, Lukás Kohútka, Pavel Cicák:
A New RISC-V CPU for Safety-Critical Systems. MECO 2023: 1-4- [c16]Ján Mach, Lukás Kohútka, Pavel Cicák:
Hardened Processor Architecture. MIXDES 2023: 176-182 - [c15]Ján Mach, Valeria Tasková, Lukás Kohútka:
Scheduling Tool for Deterministic Communication in Distributed Real-Time Systems. SQAMIA 2023 - 2022
- [c14]Lukás Kohútka:
Scheduling Periodic Real-Time Tasks with Inter-Task Synchronisation. MECO 2022: 1-4 - [c13]Lukás Kohútka:
A New FPGA - based Architecture of Task Scheduler with Support of Periodic Real-Time Tasks. MIXDES 2022: 77-82 - 2021
- [i1]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. CoRR abs/2110.01365 (2021) - 2020
- [j3]Lukás Kohútka, Viera Stopjaková:
Novel efficient on-chip task scheduler for multi-core hard real-time systems. Microprocess. Microsystems 76: 103083 (2020) - [c12]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. MECO 2020: 1-4 - [c11]Lukás Kohútka, Viera Stopjaková:
ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems. MIXDES 2020: 83-88
2010 – 2019
- 2019
- [j2]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. J. Circuits Syst. Comput. 28(Supplement-1): 1940005:1-1940005:22 (2019) - [c10]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. DDECS 2019: 1-6 - [c9]Lukás Kohútka, Viera Stopjaková:
A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks. MECO 2019: 1-4 - 2018
- [j1]Lukás Kohútka, Viera Stopjaková:
Reliable real-time task scheduler based on Rocket Queue architecture. Microelectron. Reliab. 84: 7-19 (2018) - [c8]Lukás Kohútka, Viera Stopjaková:
Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. DDECS 2018: 5-8 - [c7]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. DSD 2018: 46-53 - [c6]Lukás Kohútka, Viera Stopjaková:
A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. DTIS 2018: 1-2 - 2017
- [c5]Lukás Kohútka, Viera Stopjaková:
Rocket Queue: New data sorting architecture for real-time systems. DDECS 2017: 207-212 - [c4]Lukás Kohútka, Viera Stopjaková:
A new efficient sorting architecture for real-time systems. MECO 2017: 1-4 - 2016
- [c3]Lukás Kohútka, Viera Stopjaková:
Improved Task Scheduler for Dual-Core Real-Time Systems. DSD 2016: 471-478 - [c2]Lukás Kohútka, Viera Stopjaková:
Task scheduler for dual-core real-time systems. MIXDES 2016: 474-479 - 2015
- [c1]Lukás Kohútka, Martin Vojtko, Tibor Krajcovic:
Hardware Accelerated Scheduling in Real-Time Systems. ECBS-EERC 2015: 142-143
Coauthor Index
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