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ORCIDIlias Bouras
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2000 – 2009
- 2004
[j4]Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis, Nikos Haralabidis:
A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-μm CMOS transceiver for 802.11a/b/g wireless LAN. IEEE J. Solid State Circuits 39(7): 1180-1184 (2004)- [c8]Nikos Haralabidis, Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis:
A cost-efficient 0.18 μm CMOS RF transceiver using a fractional-N synthesizer for 802.11b/g wireless LAN applications. CICC 2004: 405-408 - 2003
- [j3]Iason Vassiliou, Kostis Vavelidis, Theodore Georgantas, Sofoklis Plevridis, Nikos Haralabidis, George Kamoulakos, Charalambos Kapnistis, Spyros Kavadias, Yiannis Kokolakis, Panagiotis Merakos, Jacques C. Rudell, Akira Yamanaka, Stamatis Bouras, Ilias Bouras:
A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN. IEEE J. Solid State Circuits 38(12): 2221-2231 (2003) - [c7]Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis, Nikos Haralabidis:
A single-chip, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, 0.18μm CMOS RF transceiver for 802.11a/b/g wireless LAN. ESSCIRC 2003: 221-224 - 2002
- [j2]Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni:
Charge Pump Circuits for Low-voltage Applications. VLSI Design 15(1): 477-483 (2002) - 2001
- [c6]Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni:
A CMOS differential logic for low-power and high-speed applications. ISCAS (4) 2001: 140-143 - [c5]Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni, Lampros Dermentzoglou:
A high-performance low-power static differential double edge-triggered flip-flop. ISCAS (4) 2001: 802-805 - 2000
- [c4]Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni:
High performance level restoration circuits for low-power reduced-swing interconnect schemes. ICECS 2000: 619-622 - [c3]Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni:
A CMOS charge pump for low voltage operation. ISCAS 2000: 577-580 - [c2]Ilias Bouras, Yiannis Liaperdos
, Angela Arapoyanni:
A high speed low power CMOS clock driver using charge recycling technique. ISCAS 2000: 657-660
1990 – 1999
- 1999
- [c1]Ioannis Moisiadis, Ilias Bouras, Constantin Papadas, Angela Arapoyanni:
Performance comparison of driver architectures in submicron CMOS and BiCMOS technologies for low voltage operation. ICECS 1999: 201-204 - 1996
- [j1]Ilias Bouras, George-Othon Glentis, Nicholas Kalouptsidis:
Architectures for block Toeplitz systems. Signal Process. 51(3): 167-190 (1996)
Coauthor Index
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