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Shady Issa
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2020 – today
- 2023
- [j2]Dimitrios Stavrakakis
, Dimitra Giantsidi
, Maurice Bailleu
, Philip Sändig
, Shady Issa
, Pramod Bhatotia
:
Anchor: A Library for Building Secure Persistent Memory Systems. Proc. ACM Manag. Data 1(4): 231:1-231:31 (2023) - 2022
- [c12]Kartal Kaan Bozdogan, Dimitrios Stavrakakis, Shady Issa, Pramod Bhatotia:
SafePM: a sanitizer for persistent memory. EuroSys 2022: 506-524 - 2021
- [c11]Jingna Zeng, Shady Issa, Paolo Romano, Luís E. T. Rodrigues, Seif Haridi:
Investigating the semantics of futures in transactional memory systems. PPoPP 2021: 16-30 - 2020
- [j1]Shady Issa
, Pascal Felber
, Alexander Matveev, Paolo Romano
:
Extending hardware transactional memory capacity via rollback-only transactions and suspend/resume. Distributed Comput. 33(3-4): 327-348 (2020) - [c10]Alex Kogan, Dave Dice, Shady Issa
:
Scalable range locks for scalable address spaces and beyond. EuroSys 2020: 8:1-8:15 - [c9]Paulo Gouveia, João Neves, Carlos Segarra, Luca Liechti, Shady Issa
, Valerio Schiavoni
, Miguel Matos
:
Kollaps: decentralized and dynamic topology emulation. EuroSys 2020: 23:1-23:16 - [c8]Shady Issa, Miguel Viegas, Pedro Raminhas, Nuno Machado, Miguel Matos, Paolo Romano:
Exploiting Symbolic Execution to Accelerate Deterministic Databases. ICDCS 2020: 678-688 - [c7]Jingna Zeng, Seif Haridi, Shady Issa, Paolo Romano
, Luís E. T. Rodrigues:
Giving Future(s) to Transactional Memory. SPAA 2020: 587-589 - [i3]Ricardo Filipe, Shady Issa, Paolo Romano, João Barreto:
Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures. CoRR abs/2003.03317 (2020) - [i2]Paulo Gouveia, João Neves, Carlos Segarra, Luca Liechti, Shady Issa, Valerio Schiavoni, Miguel Matos:
Kollaps: Decentralized and Dynamic Topology Emulation. CoRR abs/2004.02253 (2020) - [i1]Alex Kogan, Dave Dice, Shady Issa:
Scalable Range Locks for Scalable Address Spaces and Beyond. CoRR abs/2006.12144 (2020)
2010 – 2019
- 2019
- [c6]Ricardo Filipe, Shady Issa
, Paolo Romano
, João Barreto
:
Stretching the capacity of hardware transactional memory in IBM POWER architectures. PPoPP 2019: 107-119 - 2018
- [b1]Shady Issa:
Techniques for Enhancing the Efficiency of Transactional Memory Systems. Royal Institute of Technology, Stockholm, Sweden, 2018 - [c5]Pedro Raminhas, Shady Issa
, Paolo Romano
:
Enhancing Efficiency of Hybrid Transactional Memory Via Dynamic Data Partitioning Schemes. CCGrid 2018: 51-61 - [c4]Shady Issa
, Paolo Romano
, Tiago Lopes:
Speculative Read Write Locks. Middleware 2018: 214-226 - 2017
- [c3]Shady Issa
, Pascal Felber
, Alexander Matveev, Paolo Romano
:
Extending Hardware Transactional Memory Capacity via Rollback-Only Transactions and Suspend/Resume. DISC 2017: 28:1-28:16 - 2016
- [c2]Pascal Felber
, Shady Issa
, Alexander Matveev, Paolo Romano
:
Hardware read-write lock elision. EuroSys 2016: 34:1-34:15 - 2015
- [c1]Shady Issa
, Paolo Romano
, Mats Brorsson:
Green-CM: Energy Efficient Contention Management for Transactional Memory. ICPP 2015: 550-559
Coauthor Index
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