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Dhananjay Kewale

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2014
[c1]
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Sreehari Rao Patri, Pavankumarsharma Devulapalli, Dhananjay Kewale, Omkar Asbe, K. S. R. Krishna Prasad:
Power optimized PLL implementation in 180nm CMOS technology. VDAT 2014: 1-2

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